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Add rtimer_arch_sleep function, enabled with RDC_CONF_MCU_SLEEP

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This commit is contained in:
David Kopf 2011-11-14 11:10:35 -05:00
parent bdd164e003
commit 6eba721af1
2 changed files with 110 additions and 0 deletions
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109
cpu/avr/rtimer-arch.c
View file

@ -225,3 +225,112 @@ rtimer_arch_schedule(rtimer_clock_t t)
SREG = sreg;
#endif /* RTIMER_ARCH_PRESCALER */
}
#if RDC_CONF_MCU_SLEEP
/*---------------------------------------------------------------------------*/
void
rtimer_arch_sleep(rtimer_clock_t howlong)
{
/* Deep Sleep for howlong rtimer ticks. This will stop all timers except
* for TIMER2 which can be clocked using an external crystal.
* Unfortunately this is an 8 bit timer; a lower prescaler gives higher
* precision but smaller maximum sleep time.
* Here a maximum 128msec (contikimac 8Hz channel check sleep) is assumed.
* The rtimer and system clocks are adjusted to reflect the sleep time.
*/
#include <avr/sleep.h>
#include <dev/watchdog.h>
uint32_t longhowlong;
#if AVR_CONF_USE32KCRYSTAL
/* Save TIMER2 configuration if clock.c is using it */
uint8_t savedTCNT2=TCNT2, savedTCCR2A=TCCR2A, savedTCCR2B = TCCR2B, savedOCR2A = OCR2A;
#endif
cli();
watchdog_stop();
set_sleep_mode(SLEEP_MODE_PWR_SAVE);
/* Set TIMER2 clock asynchronus from external source, CTC mode */
ASSR |= (1 << AS2);
TCCR2A =(1<<WGM21);
/* Set prescaler and TIMER2 output compare register */
#if 0 //Prescale by 1024 - 32 ticks/sec, 8 seconds max sleep
TCCR2B =((1<<CS22)|(1<<CS21)|(1<<CS20));
longhowlong=howlong*32UL;
#elif 0 // Prescale by 256 - 128 ticks/sec, 2 seconds max sleep
TCCR2B =((1<<CS22)|(1<<CS21)|(0<<CS20));
longhowlong=howlong*128UL;
#elif 0 // Prescale by 128 - 256 ticks/sec, 1 seconds max sleep
TCCR2B =((1<<CS22)|(0<<CS21)|(1<<CS20));
longhowlong=howlong*256UL;
#elif 0 // Prescale by 64 - 512 ticks/sec, 500 msec max sleep
TCCR2B =((1<<CS22)|(0<<CS21)|(0<<CS20));
longhowlong=howlong*512UL;
#elif 1 // Prescale by 32 - 1024 ticks/sec, 250 msec max sleep
TCCR2B =((0<<CS22)|(1<<CS21)|(1<<CS20));
longhowlong=howlong*1024UL;
#elif 0 // Prescale by 8 - 4096 ticks/sec, 62.5 msec max sleep
TCCR2B =((0<<CS22)|(1<<CS21)|(0<<CS20));
longhowlong=howlong*4096UL;
#else // No Prescale - 32768 ticks/sec, 7.8 msec max sleep
TCCR2B =((0<<CS22)|(0<<CS21)|(1<<CS20));
longhowlong=howlong*32768UL;
#endif
OCR2A = longhowlong/RTIMER_ARCH_SECOND;
/* Reset timer count, wait for the write (which assures TCCR2x and OCR2A are finished) */
TCNT2 = 0;
while(ASSR & (1 << TCN2UB));
/* Enable TIMER2 output compare interrupt, sleep mode and sleep */
TIMSK2 |= (1 << OCIE2A);
SMCR |= (1 << SE);
sei();
ENERGEST_OFF(ENERGEST_TYPE_CPU);
if (OCR2A) sleep_mode();
//...zzZZZzz...Ding!//
/* Disable sleep mode after wakeup, so random code cant trigger sleep */
SMCR &= ~(1 << SE);
/* Adjust rtimer ticks if rtimer is enabled. TIMER3 is preferred, else TIMER1 */
#if RTIMER_ARCH_PRESCALER
#ifdef TCNT3
TCNT3 += howlong;
#else
TCNT1 += howlong;
#endif
#endif
ENERGEST_ON(ENERGEST_TYPE_CPU);
#if AVR_CONF_USE32KCRYSTAL
/* Restore clock.c configuration */
cli();
TCCR2A = savedTCCR2A;
TCCR2B = savedTCCR2B;
OCR2A = savedOCR2A;
TCNT2 = savedTCNT2;
sei();
#else
/* Disable TIMER2 interrupt */
TIMSK2 &= ~(1 << OCIE2A);
#endif
watchdog_start();
/* Adjust clock.c for the time spent sleeping */
extern void clock_adjust_ticks(uint16_t howmany);
longhowlong=CLOCK_CONF_SECOND;
longhowlong*=howlong;
clock_adjust_ticks(longhowlong/RTIMER_ARCH_SECOND);
}
#if !AVR_CONF_USE32KCRYSTAL
/*---------------------------------------------------------------------------*/
/* TIMER2 Interrupt service */
ISR(TIMER2_COMPA_vect)
{
// TIMSK2 &= ~(1 << OCIE2A); //Just one interrupt needed for waking
}
#endif /* !AVR_CONF_USE32KCRYSTAL */
#endif /* RDC_CONF_MCU_SLEEP */

1
cpu/avr/rtimer-arch.h
View file

@ -61,4 +61,5 @@
#define rtimer_arch_now() (0)
#endif
void rtimer_arch_sleep(rtimer_clock_t howlong);
#endif /* __RTIMER_ARCH_H__ */