Use a variable for all target objects

Instead of specifying them individually.  This lets included makefiles
(like my audio/Makefile.include) append objects.

Makefile.include

@@ -65,13 +65,13 @@ include $(MC1322X)/src/Makefile.src
 # $(SRCLIB) as well as target-specific rules that link $(SRCLIB_ROMVARS)
 
 # Normal targets (wildcard rule):
-%_$(BOARD).elf: $(OBJDIR)/%.o $(OBJDIR)/board.a $(MC1322X)/lib/libmc1322x.a $(SRCLIB)
+%_$(BOARD).elf: $(OBJDIR)/%.o $(TARGET_OBJ) $(SRCLIB)
 	$(call pretty,LINK,$@)
 	$Q$(CC) $(LDFLAGS) -o $@ -Wl,--start-group $^ -lm -Wl,--end-group
 
 # Targets that need space for rom variables:
 define build_elf_rule
-$(1)_$$(BOARD).elf: $$(OBJDIR)/$(1).o $$(OBJDIR)/board.a $$(MC1322X)/lib/libmc1322x.a $$(SRCLIB_ROMVARS)
+$(1)_$$(BOARD).elf: $$(OBJDIR)/$(1).o $$(TARGET_OBJ) $$(SRCLIB_ROMVARS)
 	$$(call pretty,LINK (romvars),$$@)
 	$$Q$$(CC) $$(LDFLAGS) -o $$@ -Wl,--start-group $$^ -lm -Wl,--end-group
 endef

board/Makefile.board

@@ -21,6 +21,8 @@ $(OBJDIR)/board.a: $(OBJDIR)/board.h
 	$Q$(AR) $(ARFLAGS) $@
 endif
 
+TARGET_OBJ += $(OBJDIR)/board.a
+
 # And is built from files in the parent directory
 $(OBJDIR)/%.o: %.c $(OBJDIR)/board.h $(FORCE_C_DEPENDS)
 	$(call pretty,CC,$@)

lib/Makefile.lib

@@ -7,6 +7,8 @@ LIBOBJS ?= $(patsubst %.c,%.o,$(wildcard $(MC1322X)/lib/*.c))
 
 $(MC1322X)/lib/libmc1322x.a: $(MC1322X)/lib/libmc1322x.a($(LIBOBJS))
 
+TARGET_OBJ += $(MC1322X)/lib/libmc1322x.a
+
 ifneq ($(MAKECMDGOALS),clean)
 -include $(wildcard $(MC1322X)/lib/*.d)
 endif