add uart1, uart2 and a common uart.h include
This commit is contained in:
parent
6624ee04a1
commit
6b45e353e1
9 changed files with 276 additions and 15 deletions
|
@ -163,6 +163,7 @@ extern void kbi7_isr(void) __attribute__((weak));
|
|||
extern void cal_isr(void) __attribute__((weak));
|
||||
|
||||
extern void uart1_isr(void) __attribute__((weak));
|
||||
extern void uart2_isr(void) __attribute__((weak));
|
||||
|
||||
extern void maca_isr(void) __attribute__((weak));
|
||||
|
||||
|
|
|
@ -44,7 +44,7 @@
|
|||
#include "kbi.h"
|
||||
#include "maca.h"
|
||||
#include "packet.h"
|
||||
#include "uart1.h"
|
||||
#include "uart.h"
|
||||
#include "utils.h"
|
||||
#include "asm.h"
|
||||
|
||||
|
|
|
@ -33,11 +33,94 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#ifndef UART1_H
|
||||
#define UART1_H
|
||||
#ifndef UART_H
|
||||
#define UART_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* Timer registers are all 16-bit wide with 16-bit access only */
|
||||
#define UART1_BASE (0x80005000)
|
||||
#define UART2_BASE (0x8000B000)
|
||||
|
||||
struct UART_struct {
|
||||
union {
|
||||
uint32_t CON;
|
||||
struct UART_CON {
|
||||
uint32_t :16;
|
||||
uint32_t TST:1;
|
||||
uint32_t MRXR:1;
|
||||
uint32_t MTXR:1;
|
||||
uint32_t FCE:1;
|
||||
uint32_t FCP:1;
|
||||
uint32_t XTIM:1;
|
||||
uint32_t :2;
|
||||
uint32_t TXOENB:1;
|
||||
uint32_t CONTX:1;
|
||||
uint32_t SB:1;
|
||||
uint32_t ST2:1;
|
||||
uint32_t EP:1;
|
||||
uint32_t PEN:1;
|
||||
uint32_t RXE:1;
|
||||
uint32_t TXE:1;
|
||||
} CONbits;
|
||||
};
|
||||
union {
|
||||
uint32_t STAT;
|
||||
struct UART_STAT {
|
||||
uint32_t :24;
|
||||
uint32_t TXRDY:1;
|
||||
uint32_t RXRDY:1;
|
||||
uint32_t RUE:1;
|
||||
uint32_t ROE:1;
|
||||
uint32_t TOE:1;
|
||||
uint32_t FE:1;
|
||||
uint32_t PE:1;
|
||||
uint32_t SE:1;
|
||||
} USTATbits;
|
||||
};
|
||||
union {
|
||||
uint32_t DATA;
|
||||
struct UART_DATA {
|
||||
uint32_t :24;
|
||||
uint32_t DATA:8;
|
||||
} DATAbits;
|
||||
};
|
||||
union {
|
||||
uint32_t RXCON;
|
||||
struct UART_URXCON {
|
||||
uint32_t :26;
|
||||
uint32_t LVL:6;
|
||||
} RXCONbits;
|
||||
};
|
||||
union {
|
||||
uint32_t TXCON;
|
||||
struct UART_TXCON {
|
||||
uint32_t :26;
|
||||
uint32_t LVL:6;
|
||||
} TXCONbits;
|
||||
};
|
||||
union {
|
||||
uint32_t CTS;
|
||||
struct UART_CTS {
|
||||
uint32_t :27;
|
||||
uint32_t LVL:5;
|
||||
} CTSbits;
|
||||
};
|
||||
union {
|
||||
uint32_t BR;
|
||||
struct UART_BR {
|
||||
uint32_t INC:16;
|
||||
uint32_t MOD:16;
|
||||
} BRbits;
|
||||
};
|
||||
};
|
||||
|
||||
static volatile struct UART_struct * const UART1 = (void *) (UART1_BASE);
|
||||
static volatile struct UART_struct * const UART2 = (void *) (UART2_BASE);
|
||||
|
||||
/* Old uart definitions, for compatibility */
|
||||
#ifndef REG_NO_COMPAT
|
||||
|
||||
#define UCON (0)
|
||||
/* UCON bits */
|
||||
#define UCON_SAMP 10
|
||||
|
@ -51,9 +134,6 @@
|
|||
#define UCTS (0x14)
|
||||
#define UBRCNT (0x18)
|
||||
|
||||
#define UART1_BASE (0x80005000)
|
||||
#define UART2_BASE (0x8000b000)
|
||||
|
||||
#define UART1_UCON ((volatile uint32_t *) ( UART1_BASE + UCON ))
|
||||
#define UART1_USTAT ((volatile uint32_t *) ( UART1_BASE + USTAT ))
|
||||
#define UART1_UDATA ((volatile uint32_t *) ( UART1_BASE + UDATA ))
|
||||
|
@ -70,11 +150,16 @@
|
|||
#define UART2_UCTS ((volatile uint32_t *) ( UART2_BASE + UCTS ))
|
||||
#define UART2_UBRCNT ((volatile uint32_t *) ( UART2_BASE + UBRCNT ))
|
||||
|
||||
#endif /* REG_NO_COMPAT */
|
||||
|
||||
extern volatile uint32_t u1_head, u1_tail;
|
||||
void uart1_putc(char c);
|
||||
#define uart1_can_get() (*UART1_URXCON > 0)
|
||||
uint8_t uart1_getc(void);
|
||||
|
||||
|
||||
extern volatile uint32_t u2_head, u2_tail;
|
||||
void uart2_putc(char c);
|
||||
#define uart2_can_get() (*UART2_URXCON > 0)
|
||||
uint8_t uart2_getc(void);
|
||||
|
||||
#endif
|
Loading…
Add table
Add a link
Reference in a new issue