Restore micaz/dev/clock.c, mysteriously renamed to iris/dev/sensors/battery-sensor.c
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David Kopf
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e2ad2acde4
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1 changed files with 160 additions and 0 deletions
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platform/micaz/dev/clock.c
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platform/micaz/dev/clock.c
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/*
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* Copyright (c) 2009, University of Colombo School of Computing
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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* @(#)$$
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*/
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#include "sys/clock.h"
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#include "sys/etimer.h"
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#include <avr/io.h>
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#include <avr/interrupt.h>
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static volatile clock_time_t count, scount;
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static volatile unsigned long seconds;
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/*---------------------------------------------------------------------------*/
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ISR(TIMER0_COMP_vect)
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{
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count++;
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if(++scount == CLOCK_SECOND) {
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scount = 0;
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seconds++;
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}
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if(etimer_pending()) {
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etimer_request_poll();
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}
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}
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/*---------------------------------------------------------------------------*/
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void
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clock_init(void)
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{
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/* Disable interrupts*/
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cli();
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/* Disable compare match interrupts and overflow interrupts. */
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TIMSK &= ~( _BV(TOIE0) | _BV(OCIE0) );
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/**
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* set Timer/Counter0 to be asynchronous
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* from the CPU clock with a second external
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* clock(32,768kHz) driving it.
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*/
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ASSR |= _BV(AS0);
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/*
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* Set timer control register:
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* - prescale: 32 (CS00 and CS01)
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* - counter reset via comparison register (WGM01)
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*/
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TCCR0 = _BV(CS00) | _BV(CS01) | _BV(WGM01);
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/* Set counter to zero */
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TCNT0 = 0;
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/*
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* 128 clock ticks per second.
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* 32,768 = 32 * 8 * 128
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*/
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OCR0 = 8;
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/* Clear interrupt flag register */
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TIFR = 0x00;
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/**
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* Wait for TCN0UB, OCR0UB, and TCR0UB.
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*
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*/
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while(ASSR & 0x07);
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/* Raise interrupt when value in OCR0 is reached. */
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TIMSK |= _BV(OCIE0);
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count = 0;
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/* enable all interrupts*/
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sei();
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}
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/*---------------------------------------------------------------------------*/
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clock_time_t
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clock_time(void)
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{
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clock_time_t tmp;
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do {
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tmp = count;
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} while(tmp != count);
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return tmp;
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Delay the CPU for a multiple of TODO
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*/
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void
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clock_delay(unsigned int i)
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{
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for (; i > 0; i--) { /* Needs fixing XXX */
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unsigned j;
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for (j = 50; j > 0; j--)
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asm volatile("nop");
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}
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Wait for a multiple of 1 / 128 sec = 7.8125 ms.
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*
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*/
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void
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clock_wait(int i)
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{
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clock_time_t start;
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start = clock_time();
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while(clock_time() - start < (clock_time_t)i);
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}
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/*---------------------------------------------------------------------------*/
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void
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clock_set_seconds(unsigned long sec)
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{
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// TODO
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}
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/*---------------------------------------------------------------------------*/
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unsigned long
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clock_seconds(void)
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{
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unsigned long tmp;
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do {
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tmp = seconds;
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} while(tmp != seconds);
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return tmp;
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}
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/*---------------------------------------------------------------------------*/
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