Hardware/software radio HAL patch from Roger Larsson.
Use CHANNEL_802_15_4 define for RF channel on all AVR platforms, default 26. Remove hopefully unnecessary interrupt disable wrapper on eeprom reads and writes.
This commit is contained in:
dak664
parent
21b10e8021
commit
58b7a19803
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@ -47,7 +47,7 @@
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* \file
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* \brief This file contains low-level radio driver code.
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*
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* $Id: hal.h,v 1.4 2010/11/30 19:47:40 dak664 Exp $
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* $Id: hal.h,v 1.5 2010/12/03 20:42:01 dak664 Exp $
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*/
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#ifndef HAL_AVR_H
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@ -55,9 +55,7 @@
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/*============================ INCLUDE =======================================*/
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#include <stdint.h>
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#include <stdbool.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <util/crc16.h>
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//#include <util/crc16.h>
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#include "contiki-conf.h"
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/*============================ MACROS ========================================*/
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@ -82,7 +80,7 @@
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/* TODO: Move to platform (or CPU specific) */
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#if RCB_REVISION == RCB_B
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/* 1281 rcb */
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# define SSPORT B
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@ -168,12 +166,49 @@
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# define HAS_CW_MODE
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# define HAS_SPARE_TIMER
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#elif CONTIKI_TARGET_MULLE
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/* mulle 5.2 (TODO: move to platform specific) */
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# define SSPORT 3
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# define SSPIN 5
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# define MOSIPORT 1
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# define MOSIPIN 1
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# define MISOPORT 1
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# define MISOPIN 0
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# define SCKPORT 3
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# define SCKPIN 3
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# define RSTPORT 4
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# define RSTPIN 3
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# define IRQPORT 8
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# define IRQPIN 3
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# define SLPTRPORT 0
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# define SLPTRPIN 7
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# define HAS_SPARE_TIMER
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#else
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#error "Platform undefined in hal.h"
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#endif
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/* For architectures that have all SPI signals on the same port */
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#ifndef SSPORT
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#define SSPORT SPIPORT
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#endif
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#ifndef SCKPORT
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#define SCKPORT SPIPORT
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#endif
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#ifndef MOSIPORT
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#define MOSIPORT SPIPORT
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#endif
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#ifndef MISOPORT
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#define MISOPORT SPIPORT
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#endif
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/** \} */
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/**
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@ -185,6 +220,7 @@
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* if TICKTIMER is defined as 0.
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* \{
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*/
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#if defined(__AVR__)
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#define CAT(x, y) x##y
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#define CAT2(x, y, z) x##y##z
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#define DDR(x) CAT(DDR, x)
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@ -212,6 +248,39 @@
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#define COMPVECT(x) CAT2(TIMER,x,_COMPA_vect)
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#define UDREVECT(x) CAT2(USART,x,_UDRE_vect)
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#define RXVECT(x) CAT2(USART,x,_RX_vect)
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#endif
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/* TODO: Move to CPU specific */
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#if defined(CONTIKI_TARGET_MULLE)
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#define CAT(x, y) x##y.BYTE
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#define CAT2(x, y, z) x##y##z.BYTE
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#define DDR(x) CAT(PD, x)
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#define PORT(x) CAT(P, x)
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#define PIN(x) CAT(P, x)
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#define UCSR(num, let) CAT2(UCSR,num,let)
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#define RXEN(x) CAT(RXEN,x)
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#define TXEN(x) CAT(TXEN,x)
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#define TXC(x) CAT(TXC,x)
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#define RXC(x) CAT(RXC,x)
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#define RXCIE(x) CAT(RXCIE,x)
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#define UCSZ(x,y) CAT2(UCSZ,x,y)
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#define UBRR(x,y) CAT2(UBRR,x,y)
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#define UDRE(x) CAT(UDRE,x)
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#define UDRIE(x) CAT(UDRIE,x)
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#define UDR(x) CAT(UDR,x)
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#define TCNT(x) CAT(TCNT,x)
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#define TIMSK(x) CAT(TIMSK,x)
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#define TCCR(x,y) CAT2(TCCR,x,y)
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#define COM(x,y) CAT2(COM,x,y)
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#define OCR(x,y) CAT2(OCR,x,y)
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#define CS(x,y) CAT2(CS,x,y)
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#define WGM(x,y) CAT2(WGM,x,y)
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#define OCIE(x,y) CAT2(OCIE,x,y)
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#define COMPVECT(x) CAT2(TIMER,x,_COMPA_vect)
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#define UDREVECT(x) CAT2(USART,x,_UDRE_vect)
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#define RXVECT(x) CAT2(USART,x,_RX_vect)
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#endif
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/** \} */
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/**
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@ -230,13 +299,24 @@
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#define RST RSTPIN /**< Pin number that corresponds to the RST pin. */
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#define DDR_RST DDR( RSTPORT ) /**< Data Direction Register that corresponds to the port where RST is */
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#define PORT_RST PORT( RSTPORT ) /**< Port (Write Access) where RST is connected. */
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#define PIN_RST PIN( RSTPORT ) /**< Pin (Read Access) where RST is connected. */
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#define PIN_RST PIN( RSTPORT /* BUG? */) /**< Pin (Read Access) where RST is connected. */
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#define hal_set_rst_high( ) ( PORT_RST |= ( 1 << RST ) ) /**< This macro pulls the RST pin high. */
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#define hal_set_rst_low( ) ( PORT_RST &= ~( 1 << RST ) ) /**< This macro pulls the RST pin low. */
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#define hal_get_rst( ) ( ( PIN_RST & ( 1 << RST ) ) >> RST ) /**< Read current state of the RST pin (High/Low). */
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#define HAL_SS_PIN SSPIN /**< The slave select pin. */
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#define HAL_SCK_PIN SCKPIN /**< Data bit for SCK. */
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#define HAL_MOSI_PIN MOSIPIN
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#define HAL_MISO_PIN MISOPIN
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#define HAL_PORT_SPI PORT( SPIPORT ) /**< The SPI module is located on PORTB. */
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#define HAL_PORT_SS PORT( SSPORT )
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#define HAL_PORT_SCK PORT( SCKPORT )
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#define HAL_PORT_MOSI PORT( MOSIPORT ) /**< The SPI module uses GPIO might be split on different ports. */
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#define HAL_PORT_MISO PORT( MISOPORT ) /**< The SPI module uses GPIO might be split on different ports. */
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#define HAL_DDR_SPI DDR( SPIPORT ) /**< Data Direction Register for PORTB. */
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#define HAL_DDR_SS DDR( SSPORT ) /**< Data Direction Register for MISO GPIO pin. */
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#define HAL_DDR_SCK DDR( SCKPORT ) /**< Data Direction Register for MISO GPIO pin. */
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#define HAL_DDR_MOSI DDR( MOSIPORT ) /**< Data Direction Register for MISO GPIO pin. */
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#define HAL_DDR_MISO DDR( MISOPORT ) /**< Data Direction Register for MOSI GPIO pin. */
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#define HAL_DD_SS SSPIN /**< Data Direction bit for SS. */
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#define HAL_DD_SCK SCKPIN /**< Data Direction bit for SCK. */
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#define HAL_DD_MOSI MOSIPIN /**< Data Direction bit for MOSI. */
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@ -244,8 +324,8 @@
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/** \} */
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#define HAL_SS_HIGH( ) (HAL_PORT_SPI |= ( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS high. */
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#define HAL_SS_LOW( ) (HAL_PORT_SPI &= ~( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS low. */
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#define HAL_SS_HIGH( ) (HAL_PORT_SS |= ( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS high. */
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#define HAL_SS_LOW( ) (HAL_PORT_SS &= ~( 1 << HAL_SS_PIN )) /**< MACRO for pulling SS low. */
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/** \brief Macros defined for HAL_TIMER1.
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*
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@ -254,6 +334,7 @@
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* symbols (16 us ticks).
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*/
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#if defined(__AVR__)
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#if ( F_CPU == 16000000UL )
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#define HAL_TCCR1B_CONFIG ( ( 1 << ICES1 ) | ( 1 << CS12 ) )
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#define HAL_US_PER_SYMBOL ( 1 )
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#define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TIMSK1 &= ~( 1 << TOIE1 ) )
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/** This macro will protect the following code from interrupts.*/
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#define AVR_ENTER_CRITICAL_REGION( ) {uint8_t volatile saved_sreg = SREG; cli( )
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#define HAL_ENTER_CRITICAL_REGION( ) {uint8_t volatile saved_sreg = SREG; cli( )
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/** This macro must always be used in conjunction with AVR_ENTER_CRITICAL_REGION
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/** This macro must always be used in conjunction with HAL_ENTER_CRITICAL_REGION
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so that interrupts are enabled again.*/
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#define AVR_LEAVE_CRITICAL_REGION( ) SREG = saved_sreg;}
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#define HAL_LEAVE_CRITICAL_REGION( ) SREG = saved_sreg;}
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#else /* MULLE */
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#define HAL_ENABLE_RADIO_INTERRUPT( ) ( INT1IC.BYTE |= 1 )
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#define HAL_DISABLE_RADIO_INTERRUPT( ) ( INT1IC.BYTE &= ~(1) )
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#define HAL_ENABLE_OVERFLOW_INTERRUPT( ) ( TB4IC.BYTE = 1 )
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#define HAL_DISABLE_OVERFLOW_INTERRUPT( ) ( TB4IC.BYTE = 0 )
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/** This macro will protect the following code from interrupts.*/
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#define HAL_ENTER_CRITICAL_REGION( ) MULLE_ENTER_CRITICAL_REGION( )
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/** This macro must always be used in conjunction with HAL_ENTER_CRITICAL_REGION
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so that interrupts are enabled again.*/
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#define HAL_LEAVE_CRITICAL_REGION( ) MULLE_LEAVE_CRITICAL_REGION( )
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#endif /* !__AVR__ */
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/** \brief Enable the interrupt from the radio transceiver.
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/*============================ PROTOTYPES ====================================*/
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/*============================ IMPLEMENTATION ================================*/
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#ifndef RF230BB_HARDWARE_SPI
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#define RF230BB_HARDWARE_SPI 1
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#endif
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#if defined(__AVR__)
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/*
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* AVR with hardware SPI tranfers (TODO: move to hw spi hal for avr cpu)
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*/
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#if RF230BB_HARDWARE_SPI
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// AVR with hardware spi tranfers
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#define HAL_SPI_TRANSFER_OPEN() { \
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AVR_ENTER_CRITICAL_REGION(); \
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HAL_ENTER_CRITICAL_REGION(); \
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HAL_SS_LOW(); /* Start the SPI transaction by pulling the Slave Select low. */
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#define HAL_SPI_TRANSFER_WRITE(to_write) SPDR = to_write
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#define HAL_SPI_TRANSFER_WRITE(to_write) (SPDR = (to_write))
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#define HAL_SPI_TRANSFER_WAIT() ({while ((SPSR & (1 << SPIF)) == 0) {;}}) /* gcc extension, alternative inline function */
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#define HAL_SPI_TRANSFER_READ() (SPDR)
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#define HAL_SPI_TRANSFER_CLOSE() \
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HAL_SS_HIGH(); /* End the transaction by pulling the Slave Select High. */ \
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AVR_LEAVE_CRITICAL_REGION(); \
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HAL_LEAVE_CRITICAL_REGION(); \
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}
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#define HAL_SPI_TRANSFER(to_write) ( \
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HAL_SPI_TRANSFER_WRITE(to_write), \
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HAL_SPI_TRANSFER_WAIT(), \
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HAL_SPI_TRANSFER_READ() )
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#else /* RF230BB_HARDWARE_SPI */
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// Software SPI transfers (Mulle, for reference)
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#else /* __AVR__ */
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/*
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* Other SPI architecture (parts to core, parts to m16c6Xp
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*/
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#include "contiki-mulle.h" // MULLE_ENTER_CRITICAL_REGION
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// Software SPI transfers
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#define HAL_SPI_TRANSFER_OPEN() { uint8_t spiTemp; \
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AVR_ENTER_CRITICAL_REGION(); \
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HAL_ENTER_CRITICAL_REGION(); \
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HAL_SS_LOW(); /* Start the SPI transaction by pulling the Slave Select low. */
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#define HAL_SPI_TRANSFER_WRITE(to_write) (spiTemp = spiWrite(to_write))
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#define HAL_SPI_TRANSFER_WAIT() (0)
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#define HAL_SPI_TRANSFER_WAIT() ({0;})
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#define HAL_SPI_TRANSFER_READ() (spiTemp)
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#define HAL_SPI_TRANSFER_CLOSE() \
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HAL_SS_HIGH(); /* End the transaction by pulling the Slave Select High. */ \
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AVR_LEAVE_CRITICAL_REGION(); \
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HAL_LEAVE_CRITICAL_REGION(); \
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}
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#define HAL_SPI_TRANSFER(to_write) (spiTemp = spiWrite(to_write))
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#endif /* RF230BB_HARDWARE_SPI */
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inline uint8_t spiWrite(uint8_t byte)
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{
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uint8_t data = 0;
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uint8_t mask = 0x80;
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do
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{
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if( (byte & mask) != 0 )
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HAL_PORT_MOSI |= (1 << HAL_MOSI_PIN); //call MOSI.set();
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else
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HAL_PORT_MOSI &= ~(1 << HAL_MOSI_PIN); //call MOSI.clr();
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HAL_PORT_SCK &= ~(1 << HAL_SCK_PIN); //call SCLK.clr();
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if( (HAL_PORT_MISO & (1 << HAL_MISO_PIN)) > 0) //call MISO.get() )
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data |= mask;
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HAL_PORT_SCK |= (1 << HAL_SCK_PIN); //call SCLK.set();
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} while( (mask >>= 1) != 0 );
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return data;
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}
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#endif /* !__AVR__ */
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/** \brief This function initializes the Hardware Abstraction Layer.
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*/
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#if defined(__AVR__)
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#define HAL_RF230_ISR() ISR(RADIO_VECT)
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#define HAL_TIME_ISR() ISR(TIMER1_OVF_vect)
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#define HAL_TICK_UPCNT() (TCNT1)
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void
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hal_init(void)
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{
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@ -177,7 +207,7 @@ hal_init(void)
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hal_system_time = 0;
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// hal_reset_flags();
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/*IO Specific Initialization.*/
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/*IO Specific Initialization - sleep and reset pins. */
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DDR_SLP_TR |= (1 << SLP_TR); /* Enable SLP_TR as output. */
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DDR_RST |= (1 << RST); /* Enable RST as output. */
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hal_enable_trx_interrupt(); /* Enable interrupts from the radio transceiver. */
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}
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#else /* __AVR__ */
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#define HAL_RF230_ISR() M16C_INTERRUPT(M16C_INT1)
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#define HAL_TIME_ISR() M16C_INTERRUPT(M16C_TMRB4)
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#define HAL_TICK_UPCNT() (0xFFFF-TB4) // TB4 counts down so we need to convert it to upcounting
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void
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hal_init(void)
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{
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/*Reset variables used in file.*/
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hal_system_time = 0;
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// hal_reset_flags();
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/*IO Specific Initialization - sleep and reset pins. */
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DDR_SLP_TR |= (1 << SLP_TR); /* Enable SLP_TR as output. */
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DDR_RST |= (1 << RST); /* Enable RST as output. */
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/*SPI Specific Initialization.*/
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/* Set SS, CLK and MOSI as output. */
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HAL_DDR_SS |= (1 << HAL_SS_PIN);
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HAL_DDR_SCK |= (1 << HAL_SCK_PIN);
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HAL_DDR_MOSI |= (1 << HAL_MOSI_PIN);
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HAL_DDR_MISO &= ~(1 << HAL_MISO_PIN);
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/* Set SS */
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HAL_PORT_SS |= (1 << HAL_SS_PIN); // HAL_SS_HIGH()
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HAL_PORT_SCK |= (1 << HAL_SCK_PIN);
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/*TIMER Specific Initialization.*/
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// Init count source (Timer B3)
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TB3 = ((16*10) - 1); // 16 us ticks
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TB3MR.BYTE = 0b00000000; // Timer mode, F1
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TBSR.BIT.TB3S = 1; // Start Timer B3
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TB4 = 0xFFFF; //
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TB4MR.BYTE = 0b10000001; // Counter mode, count TB3
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TBSR.BIT.TB4S = 1; // Start Timer B4
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INT1IC.BIT.POL = 1; // Select rising edge
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HAL_ENABLE_OVERFLOW_INTERRUPT(); /* Enable Timer overflow interrupt. */
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hal_enable_trx_interrupt(); /* Enable interrupts from the radio transceiver. */
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}
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#endif /* !__AVR__ */
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/*----------------------------------------------------------------------------*/
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/** \brief This function reset the interrupt flags and interrupt event handlers
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* (Callbacks) to their default value.
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@ -203,7 +276,7 @@ hal_init(void)
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//void
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//hal_reset_flags(void)
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//{
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// AVR_ENTER_CRITICAL_REGION();
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// HAL_ENTER_CRITICAL_REGION();
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/* Reset Flags. */
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// hal_bat_low_flag = 0;
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@ -213,7 +286,7 @@ hal_init(void)
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// rx_start_callback = NULL;
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// trx_end_callback = NULL;
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// AVR_LEAVE_CRITICAL_REGION();
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// HAL_LEAVE_CRITICAL_REGION();
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//}
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/*----------------------------------------------------------------------------*/
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//void
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//hal_clear_bat_low_flag(void)
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//{
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// AVR_ENTER_CRITICAL_REGION();
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// HAL_ENTER_CRITICAL_REGION();
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// hal_bat_low_flag = 0;
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// AVR_LEAVE_CRITICAL_REGION();
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// HAL_LEAVE_CRITICAL_REGION();
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//}
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/*----------------------------------------------------------------------------*/
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@ -257,9 +330,9 @@ hal_init(void)
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//void
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//hal_set_trx_end_event_handler(hal_trx_end_isr_event_handler_t trx_end_callback_handle)
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//{
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// AVR_ENTER_CRITICAL_REGION();
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// HAL_ENTER_CRITICAL_REGION();
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// trx_end_callback = trx_end_callback_handle;
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// AVR_LEAVE_CRITICAL_REGION();
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// HAL_LEAVE_CRITICAL_REGION();
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//}
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/*----------------------------------------------------------------------------*/
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@ -268,9 +341,9 @@ hal_init(void)
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//void
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//hal_clear_trx_end_event_handler(void)
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//{
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||||
// AVR_ENTER_CRITICAL_REGION();
|
||||
// HAL_ENTER_CRITICAL_REGION();
|
||||
// trx_end_callback = NULL;
|
||||
// AVR_LEAVE_CRITICAL_REGION();
|
||||
// HAL_LEAVE_CRITICAL_REGION();
|
||||
//}
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
|
|
@ -291,9 +364,9 @@ hal_init(void)
|
|||
//void
|
||||
//hal_set_rx_start_event_handler(hal_rx_start_isr_event_handler_t rx_start_callback_handle)
|
||||
//{
|
||||
// AVR_ENTER_CRITICAL_REGION();
|
||||
// HAL_ENTER_CRITICAL_REGION();
|
||||
// rx_start_callback = rx_start_callback_handle;
|
||||
// AVR_LEAVE_CRITICAL_REGION();
|
||||
// HAL_LEAVE_CRITICAL_REGION();
|
||||
//}
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
|
|
@ -302,9 +375,9 @@ hal_init(void)
|
|||
//void
|
||||
//hal_clear_rx_start_event_handler(void)
|
||||
//{
|
||||
// AVR_ENTER_CRITICAL_REGION();
|
||||
// HAL_ENTER_CRITICAL_REGION();
|
||||
// rx_start_callback = NULL;
|
||||
// AVR_LEAVE_CRITICAL_REGION();
|
||||
// HAL_LEAVE_CRITICAL_REGION();
|
||||
//}
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
|
|
@ -326,9 +399,9 @@ hal_init(void)
|
|||
//void
|
||||
//hal_clear_pll_lock_flag(void)
|
||||
//{
|
||||
// AVR_ENTER_CRITICAL_REGION();
|
||||
// HAL_ENTER_CRITICAL_REGION();
|
||||
// hal_pll_lock_flag = 0;
|
||||
// AVR_LEAVE_CRITICAL_REGION();
|
||||
// HAL_LEAVE_CRITICAL_REGION();
|
||||
//}
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
|
|
@ -488,7 +561,6 @@ hal_frame_read(hal_rx_frame_t *rx_frame)
|
|||
do{
|
||||
*rx_data++ = HAL_SPI_TRANSFER_READ();
|
||||
HAL_SPI_TRANSFER_WRITE(0);
|
||||
HAL_SPI_TRANSFER_WAIT();
|
||||
|
||||
// if (rx_frame){
|
||||
// *rx_data++ = tempData;
|
||||
|
|
@ -500,13 +572,15 @@ hal_frame_read(hal_rx_frame_t *rx_frame)
|
|||
/* A full buffer should be read in 320us at 2x spi clocking, so with a low interrupt latency overwrites should not occur */
|
||||
// crc = _crc_ccitt_update(crc, tempData);
|
||||
|
||||
HAL_SPI_TRANSFER_WAIT();
|
||||
|
||||
} while (--frame_length > 0);
|
||||
|
||||
/*Read LQI value for this frame.*/
|
||||
// if (rx_frame){
|
||||
rx_frame->lqi = HAL_SPI_TRANSFER_READ();
|
||||
// } else {
|
||||
// rx_callback(SPDR);
|
||||
// rx_callback(HAL_SPI_TRANSFER_READ());
|
||||
// }
|
||||
|
||||
|
||||
|
|
@ -567,31 +641,21 @@ hal_frame_write(uint8_t *write_buffer, uint8_t length)
|
|||
//void
|
||||
//hal_sram_read(uint8_t address, uint8_t length, uint8_t *data)
|
||||
//{
|
||||
// AVR_ENTER_CRITICAL_REGION();
|
||||
|
||||
// HAL_SS_LOW(); /* Initiate the SPI transaction. */
|
||||
// HAL_SPI_TRANSFER_OPEN();
|
||||
|
||||
/*Send SRAM read command.*/
|
||||
// SPDR = HAL_TRX_CMD_SR;
|
||||
// while ((SPSR & (1 << SPIF)) == 0) {;}
|
||||
// uint8_t dummy_read = SPDR;
|
||||
// uint8_t dummy_read = HAL_SPI_TRANSFER(HAL_TRX_CMD_SR);
|
||||
|
||||
/*Send address where to start reading.*/
|
||||
// SPDR = address;
|
||||
// while ((SPSR & (1 << SPIF)) == 0) {;}
|
||||
|
||||
// dummy_read = SPDR;
|
||||
// dummy_read = HAL_SPI_TRANSFER(address);
|
||||
|
||||
/*Upload the chosen memory area.*/
|
||||
// do{
|
||||
// SPDR = HAL_DUMMY_READ;
|
||||
// while ((SPSR & (1 << SPIF)) == 0) {;}
|
||||
// *data++ = SPDR;
|
||||
// *data++ = HAL_SPI_TRANSFER(HAL_DUMMY_READ);
|
||||
// } while (--length > 0);
|
||||
|
||||
// HAL_SS_HIGH();
|
||||
// HAL_SPI_TRANSFER_CLOSE();
|
||||
|
||||
// AVR_LEAVE_CRITICAL_REGION();
|
||||
//}
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
|
|
@ -606,30 +670,21 @@ hal_frame_write(uint8_t *write_buffer, uint8_t length)
|
|||
//void
|
||||
//hal_sram_write(uint8_t address, uint8_t length, uint8_t *data)
|
||||
//{
|
||||
// AVR_ENTER_CRITICAL_REGION();
|
||||
|
||||
// HAL_SS_LOW();
|
||||
// HAL_SPI_TRANSFER_OPEN();
|
||||
|
||||
/*Send SRAM write command.*/
|
||||
// SPDR = HAL_TRX_CMD_SW;
|
||||
// while ((SPSR & (1 << SPIF)) == 0) {;}
|
||||
// uint8_t dummy_read = SPDR;
|
||||
// uint8_t dummy_read = HAL_SPI_TRANSFER(HAL_TRX_CMD_SW);
|
||||
|
||||
/*Send address where to start writing to.*/
|
||||
// SPDR = address;
|
||||
// while ((SPSR & (1 << SPIF)) == 0) {;}
|
||||
// dummy_read = SPDR;
|
||||
// dummy_read = HAL_SPI_TRANSFER(address);
|
||||
|
||||
/*Upload the chosen memory area.*/
|
||||
// do{
|
||||
// SPDR = *data++;
|
||||
// while ((SPSR & (1 << SPIF)) == 0) {;}
|
||||
// dummy_read = SPDR;
|
||||
// dummy_read = HAL_SPI_TRANSFER(*data++);
|
||||
// } while (--length > 0);
|
||||
|
||||
// HAL_SS_HIGH();
|
||||
// HAL_SPI_TRANSFER_CLOSE();
|
||||
|
||||
// AVR_LEAVE_CRITICAL_REGION();
|
||||
//}
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
|
|
@ -654,24 +709,29 @@ volatile char rf230interruptflag;
|
|||
#define INTERRUPTDEBUG(arg)
|
||||
#endif
|
||||
|
||||
ISR(RADIO_VECT)
|
||||
HAL_RF230_ISR()
|
||||
{
|
||||
/*The following code reads the current system time. This is done by first
|
||||
reading the hal_system_time and then adding the 16 LSB directly from the
|
||||
TCNT1 register. Not implented in RF230BB for speed
|
||||
hardware counter.
|
||||
*/
|
||||
// uint32_t isr_timestamp = hal_system_time;
|
||||
// isr_timestamp <<= 16;
|
||||
// isr_timestamp |= TCNT1;
|
||||
// isr_timestamp |= HAL_TICK_UPCNT(); // TODO: what if this wraps after reading hal_system_time?
|
||||
|
||||
volatile uint8_t state;
|
||||
|
||||
uint8_t interrupt_source; /* used after HAL_SPI_TRANSFER_OPEN/CLOSE block */
|
||||
|
||||
INTERRUPTDEBUG(1);
|
||||
|
||||
/* Using SPI bus from ISR is generally a bad idea... */
|
||||
/* Note: all IRQ are not always automatically disabled when running in ISR */
|
||||
HAL_SPI_TRANSFER_OPEN();
|
||||
|
||||
/*Read Interrupt source.*/
|
||||
HAL_SS_LOW();
|
||||
|
||||
/*Send Register address and read register content.*/
|
||||
SPDR = RG_IRQ_STATUS | HAL_TRX_CMD_RR;
|
||||
HAL_SPI_TRANSFER_WRITE(RG_IRQ_STATUS | HAL_TRX_CMD_RR);
|
||||
|
||||
/* This is the second part of the convertion of system time to a 16 us time
|
||||
base. The division is moved here so we can spend less time waiting for SPI
|
||||
|
|
@ -680,31 +740,26 @@ ISR(RADIO_VECT)
|
|||
// isr_timestamp /= HAL_US_PER_SYMBOL; /* Divide so that we get time in 16us resolution. */
|
||||
// isr_timestamp &= HAL_SYMBOL_MASK;
|
||||
|
||||
while ((SPSR & (1 << SPIF)) == 0) {;}
|
||||
uint8_t interrupt_source = SPDR; /* The interrupt variable is used as a dummy read. */
|
||||
HAL_SPI_TRANSFER_WAIT(); /* AFTER possible interleaved processing */
|
||||
|
||||
SPDR = interrupt_source;
|
||||
while ((SPSR & (1 << SPIF)) == 0) {;}
|
||||
interrupt_source = SPDR; /* The interrupt source is read. */
|
||||
interrupt_source = HAL_SPI_TRANSFER_READ(); /* The interrupt variable is used as a dummy read. */
|
||||
|
||||
interrupt_source = HAL_SPI_TRANSFER(interrupt_source);
|
||||
|
||||
HAL_SPI_TRANSFER_CLOSE();
|
||||
|
||||
HAL_SS_HIGH();
|
||||
|
||||
/*Handle the incomming interrupt. Prioritized.*/
|
||||
if ((interrupt_source & HAL_RX_START_MASK)){
|
||||
INTERRUPTDEBUG(10);
|
||||
// if(rx_start_callback != NULL){
|
||||
// /* Read Frame length and call rx_start callback. */
|
||||
// HAL_SS_LOW();
|
||||
// HAL_SPI_TRANSFER_OPEN();
|
||||
|
||||
// SPDR = HAL_TRX_CMD_FR;
|
||||
// while ((SPSR & (1 << SPIF)) == 0) {;}
|
||||
// uint8_t frame_length = SPDR;
|
||||
// uint8_t frame_length = HAL_SPI_TRANSFER(HAL_TRX_CMD_FR);
|
||||
|
||||
// SPDR = frame_length; /* frame_length used for dummy data */
|
||||
// while ((SPSR & (1 << SPIF)) == 0) {;}
|
||||
// frame_length = SPDR;
|
||||
// frame_length = HAL_SPI_TRANSFER(frame_length);
|
||||
|
||||
// HAL_SS_HIGH();
|
||||
// HAL_SPI_TRANSFER_CLOSE();
|
||||
|
||||
// rx_start_callback(isr_timestamp, frame_length);
|
||||
// }
|
||||
|
|
@ -728,10 +783,8 @@ ISR(RADIO_VECT)
|
|||
#if RF230_CONF_AUTOACK
|
||||
rf230_last_rssi=hal_subregister_read(SR_ED_LEVEL);
|
||||
if (rf230_last_rssi >= RF230_MIN_RX_POWER) {
|
||||
// if (hal_subregister_read(SR_ED_LEVEL) >= RF230_MIN_RX_POWER) {
|
||||
#else
|
||||
rf230_last_rssi=hal_subregister_read(SR_RSSI);
|
||||
// if (hal_subregister_read(SR_RSSI) >= RF230_MIN_RX_POWER/3) {
|
||||
if (rf230_last_rssi >= RF230_MIN_RX_POWER/3) {
|
||||
#endif
|
||||
#endif
|
||||
|
|
@ -789,7 +842,7 @@ ISR(RADIO_VECT)
|
|||
*/
|
||||
void TIMER1_OVF_vect(void);
|
||||
#else /* !DOXYGEN */
|
||||
ISR(TIMER1_OVF_vect)
|
||||
HAL_TIME_ISR()
|
||||
{
|
||||
hal_system_time++;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@
|
|||
*
|
||||
* This file is part of the Contiki operating system.
|
||||
*
|
||||
* @(#)$Id: rf230bb.c,v 1.14 2010/11/26 20:39:15 dak664 Exp $
|
||||
* @(#)$Id: rf230bb.c,v 1.15 2010/12/03 20:42:01 dak664 Exp $
|
||||
*/
|
||||
/*
|
||||
* This code is almost device independent and should be easy to port.
|
||||
|
|
@ -43,6 +43,7 @@
|
|||
#if defined(__AVR__)
|
||||
#include <avr/io.h>
|
||||
#include <util/delay.h>
|
||||
#define delay_us( us ) ( _delay_us( ( us ) ) )
|
||||
#include <avr/pgmspace.h>
|
||||
#elif defined(__MSP430__)
|
||||
#include <io.h>
|
||||
|
|
|
|||
|
|
@ -45,7 +45,7 @@
|
|||
* \file
|
||||
* \brief This file contains radio driver code.
|
||||
*
|
||||
* $Id: rf230bb.h,v 1.3 2010/09/17 21:59:09 dak664 Exp $
|
||||
* $Id: rf230bb.h,v 1.4 2010/12/03 20:42:01 dak664 Exp $
|
||||
*/
|
||||
|
||||
#ifndef RADIO_H
|
||||
|
|
@ -211,8 +211,6 @@ uint8_t rf230_get_raw_rssi(void);
|
|||
|
||||
#define rf230_rssi rf230_get_raw_rssi
|
||||
|
||||
#define delay_us( us ) ( _delay_loop_2( ( F_CPU / 4000000UL ) * ( us ) ) )
|
||||
|
||||
#endif
|
||||
/** @} */
|
||||
/*EOF*/
|
||||
|
|
|
|||
|
|
@ -102,6 +102,7 @@
|
|||
#define NETSTACK_CONF_RDC sicslowmac_driver
|
||||
#define NETSTACK_CONF_FRAMER framer_802154
|
||||
#define NETSTACK_CONF_RADIO rf230_driver
|
||||
#define CHANNEL_802_15_4 26
|
||||
#define RF230_CONF_AUTOACK 1
|
||||
#define RF230_CONF_AUTORETRIES 2
|
||||
#define SICSLOWPAN_CONF_FRAG 1
|
||||
|
|
@ -116,6 +117,7 @@
|
|||
#define NETSTACK_CONF_RDC contikimac_driver
|
||||
#define NETSTACK_CONF_FRAMER framer_802154
|
||||
#define NETSTACK_CONF_RADIO rf230_driver
|
||||
#define CHANNEL_802_15_4 26
|
||||
#define RF230_CONF_AUTOACK 0
|
||||
#define RF230_CONF_AUTORETRIES 0
|
||||
|
||||
|
|
@ -125,6 +127,7 @@
|
|||
#define NETSTACK_CONF_RDC cxmac_driver
|
||||
#define NETSTACK_CONF_FRAMER framer_802154
|
||||
#define NETSTACK_CONF_RADIO rf230_driver
|
||||
#define CHANNEL_802_15_4 26
|
||||
#define RF230_CONF_AUTOACK 0
|
||||
#define RF230_CONF_AUTORETRIES 0
|
||||
#define MAC_CONF_CHANNEL_CHECK_RATE 8
|
||||
|
|
@ -189,7 +192,6 @@
|
|||
//#define RF230_MIN_RX_POWER 30
|
||||
|
||||
#define UIP_CONF_ROUTER 1
|
||||
#define UIP_CONF_IPV6_RPL 1
|
||||
|
||||
/* Handle 10 neighbors */
|
||||
#define UIP_CONF_DS6_NBR_NBU 10
|
||||
|
|
|
|||
|
|
@ -126,7 +126,12 @@ static uint8_t get_channel_from_eeprom() {
|
|||
|
||||
if(eeprom_channel==~eeprom_check)
|
||||
return eeprom_channel;
|
||||
|
||||
#ifdef CHANNEL_802_15_4
|
||||
return(CHANNEL_802_15_4);
|
||||
#else
|
||||
return 26;
|
||||
#endif
|
||||
}
|
||||
|
||||
static bool get_mac_from_eeprom(uint8_t* macptr) {
|
||||
|
|
|
|||
|
|
@ -298,11 +298,9 @@ void menu_process(char c)
|
|||
if(settings_set_uint8(SETTINGS_KEY_CHANNEL, tempchannel)!=SETTINGS_STATUS_OK) {
|
||||
PRINTF_P(PSTR("\n\rChannel changed to %d, but unable to store in EEPROM!\n\r"),tempchannel);
|
||||
} else
|
||||
#else
|
||||
AVR_ENTER_CRITICAL_REGION();
|
||||
#else
|
||||
eeprom_write_byte((uint8_t *) 9, tempchannel); //Write channel
|
||||
eeprom_write_byte((uint8_t *)10, ~tempchannel); //Bit inverse as check
|
||||
AVR_LEAVE_CRITICAL_REGION();
|
||||
#endif
|
||||
PRINTF_P(PSTR("\n\rChannel changed to %d and stored in EEPROM.\n\r"),tempchannel);
|
||||
}
|
||||
|
|
@ -446,8 +444,16 @@ void menu_process(char c)
|
|||
#include "rpl.h"
|
||||
extern uip_ds6_nbr_t uip_ds6_nbr_cache[];
|
||||
extern uip_ds6_route_t uip_ds6_routing_table[];
|
||||
extern uip_ds6_netif_t uip_ds6_if;
|
||||
case 'N':
|
||||
{ uint8_t i,j;
|
||||
PRINTF_P(PSTR("\n\rAddresses [%u max]\n\r"),UIP_DS6_ADDR_NB);
|
||||
for (i=0;i<UIP_DS6_ADDR_NB;i++) {
|
||||
if (uip_ds6_if.addr_list[i].isused) {
|
||||
ipaddr_add(&uip_ds6_if.addr_list[i].ipaddr);
|
||||
PRINTF_P(PSTR("\n\r"));
|
||||
}
|
||||
}
|
||||
PRINTF_P(PSTR("\n\rNeighbors [%u max]\n\r"),UIP_DS6_NBR_NB);
|
||||
for(i = 0,j=1; i < UIP_DS6_NBR_NB; i++) {
|
||||
if(uip_ds6_nbr_cache[i].isused) {
|
||||
|
|
|
|||
|
|
@ -241,6 +241,7 @@ extern void mac_log_802_15_4_rx(const uint8_t* buffer, size_t total_len);
|
|||
#define NETSTACK_CONF_RDC sicslowmac_driver
|
||||
#define NETSTACK_CONF_FRAMER framer_802154
|
||||
#define NETSTACK_CONF_RADIO rf230_driver
|
||||
#define CHANNEL_802_15_4 26
|
||||
#define RF230_CONF_AUTOACK 1
|
||||
#define RF230_CONF_AUTORETRIES 2
|
||||
#define QUEUEBUF_CONF_NUM 1
|
||||
|
|
@ -254,6 +255,7 @@ extern void mac_log_802_15_4_rx(const uint8_t* buffer, size_t total_len);
|
|||
#define NETSTACK_CONF_RDC contikimac_driver
|
||||
#define NETSTACK_CONF_FRAMER framer_802154
|
||||
#define NETSTACK_CONF_RADIO rf230_driver
|
||||
#define 802_15_4_CHANNEL 26
|
||||
#define RF230_CONF_AUTOACK 0
|
||||
#define RF230_CONF_AUTORETRIES 0
|
||||
|
||||
|
|
@ -263,6 +265,7 @@ extern void mac_log_802_15_4_rx(const uint8_t* buffer, size_t total_len);
|
|||
#define NETSTACK_CONF_RDC cxmac_driver
|
||||
#define NETSTACK_CONF_FRAMER framer_802154
|
||||
#define NETSTACK_CONF_RADIO rf230_driver
|
||||
#define 802_15_4_CHANNEL 26
|
||||
#define RF230_CONF_AUTOACK 0
|
||||
#define RF230_CONF_AUTORETRIES 0
|
||||
#define MAC_CONF_CHANNEL_CHECK_RATE 8
|
||||
|
|
@ -282,7 +285,7 @@ extern void mac_log_802_15_4_rx(const uint8_t* buffer, size_t total_len);
|
|||
//#pragma mark RPL Settings
|
||||
/* ************************************************************************** */
|
||||
#if UIP_CONF_IPV6 //Allows hello-world ip4 to compile
|
||||
#define UIP_CONF_IPV6_RPL 0
|
||||
#define UIP_CONF_IPV6_RPL 0
|
||||
#endif
|
||||
|
||||
#if UIP_CONF_IPV6_RPL
|
||||
|
|
@ -312,7 +315,7 @@ extern void mac_log_802_15_4_rx(const uint8_t* buffer, size_t total_len);
|
|||
//#define RF230_MIN_RX_POWER 30
|
||||
|
||||
#define UIP_CONF_ROUTER 1
|
||||
#define UIP_CONF_ROUTER_RECEIVE_RA 1
|
||||
#define UIP_CONF_ROUTER_RECEIVE_RA 0
|
||||
#define RPL_BORDER_ROUTER 1
|
||||
#define RPL_CONF_STATS 0
|
||||
#define UIP_CONF_BUFFER_SIZE 1300
|
||||
|
|
|
|||
|
|
@ -147,37 +147,41 @@ uint16_t dag_id[] PROGMEM = {0x1111, 0x1100, 0, 0, 0, 0, 0, 0x0011};
|
|||
PROCESS(border_router_process, "RPL Border Router");
|
||||
PROCESS_THREAD(border_router_process, ev, data)
|
||||
{
|
||||
rpl_dag_t *dag;
|
||||
|
||||
PROCESS_BEGIN();
|
||||
|
||||
PROCESS_PAUSE();
|
||||
|
||||
// printf_P(PSTR("%d neighbors"), UIP_DS6_ADDR_NB);
|
||||
{ char buf[sizeof(dag_id)];
|
||||
{ rpl_dag_t *dag;
|
||||
char buf[sizeof(dag_id)];
|
||||
memcpy_P(buf,dag_id,sizeof(dag_id));
|
||||
dag = rpl_set_root((uip_ip6addr_t *)buf);
|
||||
}
|
||||
#if UIP_CONF_IPV6_RPL
|
||||
|
||||
/* Assign bbbb::11 to the uip stack, and bbbb::1 to the host network interface, e.g. $ip -6 address add bbbb::1/64 dev usb0 */
|
||||
/* $ifconfig usb0 -arp on Ubuntu to skip the neighbor solicitations. Don't know how to skip NS on Windows yet. */
|
||||
/* $ifconfig usb0 -arp on Ubuntu to skip the neighbor solicitations. Add explicit neighbors on other OSs */
|
||||
if(dag != NULL) {
|
||||
PRINTF("created a new RPL dag\n");
|
||||
|
||||
#if UIP_CONF_ROUTER_RECEIVE_RA
|
||||
//Contiki stack will shut down until assigned an address from the interface RA
|
||||
//Currently this requires changes in the core rpl-icmp6.c to pass the link-local RA broadcast
|
||||
|
||||
#else
|
||||
uip_ip6addr_t ipaddr;
|
||||
uip_ip6addr(&ipaddr, 0xbbbb, 0, 0, 0, 0, 0, 0, 0x11);
|
||||
// uip_ds6_addr_add(&ipaddr, 0, ADDR_AUTOCONF);
|
||||
uip_ds6_addr_add(&ipaddr, 0, ADDR_MANUAL);
|
||||
rpl_set_prefix(dag, &ipaddr, 64);
|
||||
PRINTF("created a new RPL dag\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
}
|
||||
}
|
||||
/* The border router runs with a 100% duty cycle in order to ensure high
|
||||
packet reception rates. */
|
||||
// NETSTACK_MAC.off(1);
|
||||
|
||||
while(1) {
|
||||
PROCESS_YIELD();
|
||||
// rpl_repair_dag(rpl_get_dag(RPL_ANY_INSTANCE));
|
||||
// rpl_set_prefix(rpl_get_dag(RPL_ANY_INSTANCE), &ipaddr, 64);
|
||||
// rpl_repair_dag(rpl_get_dag(RPL_ANY_INSTANCE));
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -219,7 +223,13 @@ static uint8_t get_channel_from_eeprom() {
|
|||
|
||||
if(eeprom_channel==~eeprom_check)
|
||||
return eeprom_channel;
|
||||
|
||||
#ifdef CHANNEL_802_15_4
|
||||
return(CHANNEL_802_15_4);
|
||||
#else
|
||||
return 26;
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
}
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $Id: httpd-simple-avr.c,v 1.6 2010/12/01 16:23:55 dak664 Exp $
|
||||
* $Id: httpd-simple-avr.c,v 1.7 2010/12/03 20:42:02 dak664 Exp $
|
||||
*/
|
||||
|
||||
/**
|
||||
|
|
@ -253,7 +253,7 @@ extern uip_ds6_route_t uip_ds6_routing_table[];
|
|||
static
|
||||
PT_THREAD(generate_routes(struct httpd_state *s))
|
||||
{
|
||||
int i;
|
||||
uint8_t i=0;
|
||||
PSOCK_BEGIN(&s->sout);
|
||||
|
||||
PSOCK_GENERATOR_SEND(&s->sout, generate_string_P, TOP1);
|
||||
|
|
@ -262,6 +262,8 @@ PT_THREAD(generate_routes(struct httpd_state *s))
|
|||
#if UIP_CONF_IPV6 //allow ip4 builds
|
||||
blen = 0;
|
||||
ADD("<h2>Neighbors [%u max]</h2>",UIP_DS6_NBR_NB);
|
||||
PSOCK_GENERATOR_SEND(&s->sout, generate_string, buf);
|
||||
blen = 0;
|
||||
for(i = 0; i < UIP_DS6_NBR_NB; i++) {
|
||||
if(uip_ds6_nbr_cache[i].isused) {
|
||||
ipaddr_add(&uip_ds6_nbr_cache[i].ipaddr);
|
||||
|
|
@ -284,6 +286,8 @@ PT_THREAD(generate_routes(struct httpd_state *s))
|
|||
blen=0;
|
||||
ipaddr_add(&uip_ds6_routing_table[i].nexthop);
|
||||
if(uip_ds6_routing_table[i].state.lifetime < 600) {
|
||||
PSOCK_GENERATOR_SEND(&s->sout, generate_string, buf);
|
||||
blen=0;
|
||||
ADD(") %lus<br>", uip_ds6_routing_table[i].state.lifetime);
|
||||
} else {
|
||||
ADD(")<br>");
|
||||
|
|
|
|||
|
|
@ -122,15 +122,17 @@ init_lowlevel(void)
|
|||
|
||||
rimeaddr_t addr;
|
||||
memset(&addr, 0, sizeof(rimeaddr_t));
|
||||
AVR_ENTER_CRITICAL_REGION();
|
||||
eeprom_read_block ((void *)&addr.u8, &mac_address, 8);
|
||||
AVR_LEAVE_CRITICAL_REGION();
|
||||
|
||||
#if UIP_CONF_IPV6
|
||||
memcpy(&uip_lladdr.addr, &addr.u8, 8);
|
||||
#endif
|
||||
rf230_set_pan_addr(IEEE802154_PANID, 0, (uint8_t *)&addr.u8);
|
||||
rf230_set_channel(24);
|
||||
#ifdef CHANNEL_802_15_4
|
||||
rf230_set_channel(CHANNEL_802_15_4);
|
||||
#else
|
||||
rf230_set_channel(26);
|
||||
#endif
|
||||
|
||||
rimeaddr_set_node_addr(&addr);
|
||||
|
||||
|
|
|
|||
|
|
@ -43,7 +43,6 @@
|
|||
#define __CONTIKI_CONF_H__
|
||||
|
||||
/* MCU and clock rate */
|
||||
#define MCU_MHZ 8
|
||||
#define PLATFORM PLATFORM_AVR
|
||||
#define HARWARE_REVISION ZIGBIT
|
||||
|
||||
|
|
@ -97,6 +96,7 @@
|
|||
#define NETSTACK_CONF_RDC sicslowmac_driver
|
||||
#define NETSTACK_CONF_FRAMER framer_802154
|
||||
#define NETSTACK_CONF_RADIO rf230_driver
|
||||
#define CHANNEL_802_15_4 26
|
||||
#define RF230_CONF_AUTOACK 1
|
||||
#define RF230_CONF_AUTORETRIES 2
|
||||
#define SICSLOWPAN_CONF_FRAG 1
|
||||
|
|
|
|||
Loading…
Reference in a new issue