From 53d03aa924e67e7fcb808f8bc1a434f6f0cfca7b Mon Sep 17 00:00:00 2001
From: fros4943 <fros4943>
Date: Tue, 27 Oct 2009 16:25:28 +0000
Subject: [PATCH] uart correction values for 3.9Mhz (default sky freq.)

---
 cpu/msp430/dev/uart1.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/cpu/msp430/dev/uart1.c b/cpu/msp430/dev/uart1.c
index 3e23310b2..58d722d5b 100644
--- a/cpu/msp430/dev/uart1.c
+++ b/cpu/msp430/dev/uart1.c
@@ -26,7 +26,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- * @(#)$Id: uart1.c,v 1.12 2009/09/08 10:39:49 nifi Exp $
+ * @(#)$Id: uart1.c,v 1.13 2009/10/27 16:25:28 fros4943 Exp $
  */
 
 /*
@@ -132,14 +132,14 @@ uart1_init(unsigned long ubr)
   /*
    * UMCTL1 values calculated using
    * http://mspgcc.sourceforge.net/baudrate.html
-   * Table assumes that F_CPU = 2,457,600 Hz.
+   * Table assumes that F_CPU = 3,900,000 Hz.
    */
   switch(ubr) {
   case UART1_BAUD2UBR(115200ul):
-    UMCTL1 = 0x4a;
+    UMCTL1 = 0xF7;
     break;
   case UART1_BAUD2UBR(57600ul):
-    UMCTL1 = 0x5b;
+    UMCTL1 = 0xED;
     break;
   default:
     /* 9600, 19200, 38400 don't require any correction */