Make HW timer for contiki rtimer configurable
... and configure osd platform to use timer 5. With the new configuration we can use timer 3 for generating hardware PWM.
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3 changed files with 86 additions and 97 deletions
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@ -51,29 +51,24 @@
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#include "rtimer-arch.h"
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#include "rtimer-arch.h"
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#if defined(__AVR_ATmega1284P__)
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#if defined(__AVR_ATmega1284P__)
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#define ETIMSK TIMSK3
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#define ETIFR TIFR3
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#define TICIE3 ICIE3
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//Has no 'C', so we just set it to B. The code doesn't really use C so this
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//Has no 'C', so we just set it to B. The code doesn't really use C so this
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//is safe to do but lets it compile. Probably should enable the warning if
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//is safe to do but lets it compile. Probably should enable the warning if
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//it is ever used on other platforms.
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//it is ever used on other platforms.
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//#warning no OCIE3C in timer3 architecture, hopefully it won't be needed!
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//#warning no OCIE3C in timer3 architecture, hopefully it won't be needed!
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#define OCIE3C OCIE3B
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#define OCIE3C OCIE3B
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#define OCF3C OCF3B
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#define OCF3C OCF3B
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#define PLAT_TCCRC PLAT_TCCRB
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#endif
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#endif
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#if defined(__AVR_ATmega1281__) || defined(__AVR_AT90USB1287__) || defined(__AVR_ATmega128RFA1__)
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#if defined(__AVR_ATmega1281__) || defined(__AVR_AT90USB1287__) || defined(__AVR_ATmega128RFA1__)
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#define ETIMSK TIMSK3
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#define ETIFR TIFR3
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#define TICIE3 ICIE3
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#endif
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#endif
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#if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega644__)
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#if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega644__)
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#define TIMSK TIMSK1
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//Has no 'C', so we just set it to B. The code doesn't really use C so this
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#define TICIE1 ICIE1
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//is safe to do but lets it compile.
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#define TIFR TIFR1
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#define OCIE1C OCIE1B
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#define OCF1C OCF1B
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#define PLAT_TCCRC PLAT_TCCRB
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#endif
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#endif
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/* Track flow through rtimer interrupts*/
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/* Track flow through rtimer interrupts*/
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@ -85,14 +80,19 @@ extern uint8_t debugflowsize,debugflow[DEBUGFLOWSIZE];
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#endif
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#endif
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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#if defined(TCNT3) && RTIMER_ARCH_PRESCALER
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#if RTIMER_ARCH_PRESCALER
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ISR (TIMER3_COMPA_vect) {
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ISR (PLAT_VECT) {
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DEBUGFLOW('/');
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DEBUGFLOW('/');
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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/* Disable rtimer interrupts */
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/* Disable rtimer interrupts */
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ETIMSK &= ~((1 << OCIE3A) | (1 << OCIE3B) | (1 << TOIE3) |
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PLAT_TIMSK &=
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(1 << TICIE3) | (1 << OCIE3C));
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~( (1 << PLAT_OCIEA)
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| (1 << PLAT_OCIEB)
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| (1 << PLAT_OCIEC)
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| (1 << PLAT_TOIE)
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| (1 << PLAT_ICIE)
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);
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#if RTIMER_CONF_NESTED_INTERRUPTS
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#if RTIMER_CONF_NESTED_INTERRUPTS
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/* Enable nested interrupts. Allows radio interrupt during rtimer interrupt. */
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/* Enable nested interrupts. Allows radio interrupt during rtimer interrupt. */
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@ -106,17 +106,6 @@ ISR (TIMER3_COMPA_vect) {
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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DEBUGFLOW('\\');
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DEBUGFLOW('\\');
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}
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}
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#elif RTIMER_ARCH_PRESCALER
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#warning "No Timer3 in rtimer-arch.c - using Timer1 instead"
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ISR (TIMER1_COMPA_vect) {
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DEBUGFLOW('/');
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TIMSK &= ~((1<<TICIE1)|(1<<OCIE1A)|(1<<OCIE1B)|(1<<TOIE1));
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rtimer_run_next();
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DEBUGFLOW('\\');
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}
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#endif
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#endif
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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void
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void
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@ -128,67 +117,45 @@ rtimer_arch_init(void)
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sreg = SREG;
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sreg = SREG;
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cli ();
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cli ();
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#ifdef TCNT3
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/* Disable all timer functions */
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/* Disable all timer functions */
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ETIMSK &= ~((1 << OCIE3A) | (1 << OCIE3B) | (1 << TOIE3) |
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PLAT_TIMSK &=
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(1 << TICIE3) | (1 << OCIE3C));
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~( (1 << PLAT_OCIEA)
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| (1 << PLAT_OCIEB)
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| (1 << PLAT_OCIEC)
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| (1 << PLAT_TOIE)
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| (1 << PLAT_ICIE)
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);
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/* Write 1s to clear existing timer function flags */
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/* Write 1s to clear existing timer function flags */
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ETIFR |= (1 << ICF3) | (1 << OCF3A) | (1 << OCF3B) | (1 << TOV3) |
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PLAT_TIFR |=
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(1 << OCF3C);
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( (1 << PLAT_ICF)
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| (1 << PLAT_OCFA)
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| (1 << PLAT_OCFB)
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| (1 << PLAT_OCFC)
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| (1 << PLAT_TOV)
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);
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/* Default timer behaviour */
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/* Default timer behaviour */
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TCCR3A = 0;
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PLAT_TCCRA = 0;
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TCCR3B = 0;
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PLAT_TCCRB = 0;
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TCCR3C = 0;
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PLAT_TCCRC = 0;
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/* Reset counter */
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/* Reset counter */
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TCNT3 = 0;
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PLAT_TCNT = 0;
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#if RTIMER_ARCH_PRESCALER==1024
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#if RTIMER_ARCH_PRESCALER==1024
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TCCR3B |= 5;
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PLAT_TCCRB |= 5;
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#elif RTIMER_ARCH_PRESCALER==256
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#elif RTIMER_ARCH_PRESCALER==256
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TCCR3B |= 4;
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PLAT_TCCRB |= 4;
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#elif RTIMER_ARCH_PRESCALER==64
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#elif RTIMER_ARCH_PRESCALER==64
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TCCR3B |= 3;
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PLAT_TCCRB |= 3;
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#elif RTIMER_ARCH_PRESCALER==8
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#elif RTIMER_ARCH_PRESCALER==8
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TCCR3B |= 2;
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PLAT_TCCRB |= 2;
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#elif RTIMER_ARCH_PRESCALER==1
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#elif RTIMER_ARCH_PRESCALER==1
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TCCR3B |= 1;
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PLAT_TCCRB |= 1;
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#else
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#else
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#error Timer3 PRESCALER factor not supported.
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#error Timer PRESCALER factor not supported.
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#endif
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#endif
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#elif RTIMER_ARCH_PRESCALER
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/* Leave timer1 alone if PRESCALER set to zero */
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/* Obviously you can not then use rtimers */
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TIMSK &= ~((1<<TICIE1)|(1<<OCIE1A)|(1<<OCIE1B)|(1<<TOIE1));
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TIFR |= (1 << ICF1) | (1 << OCF1A) | (1 << OCF1B) | (1 << TOV1);
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/* Default timer behaviour */
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TCCR1A = 0;
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TCCR1B = 0;
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/* Reset counter */
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TCNT1 = 0;
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/* Start clock */
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#if RTIMER_ARCH_PRESCALER==1024
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TCCR1B |= 5;
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#elif RTIMER_ARCH_PRESCALER==256
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TCCR1B |= 4;
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#elif RTIMER_ARCH_PRESCALER==64
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TCCR1B |= 3;
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#elif RTIMER_ARCH_PRESCALER==8
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TCCR1B |= 2;
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#elif RTIMER_ARCH_PRESCALER==1
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TCCR1B |= 1;
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#else
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#error Timer1 PRESCALER factor not supported.
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#endif
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#endif /* TCNT3 */
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/* Restore interrupt state */
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/* Restore interrupt state */
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SREG = sreg;
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SREG = sreg;
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#endif /* RTIMER_ARCH_PRESCALER */
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#endif /* RTIMER_ARCH_PRESCALER */
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@ -203,23 +170,18 @@ rtimer_arch_schedule(rtimer_clock_t t)
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sreg = SREG;
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sreg = SREG;
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cli ();
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cli ();
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DEBUGFLOW(':');
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DEBUGFLOW(':');
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#ifdef TCNT3
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/* Set compare register */
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/* Set compare register */
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OCR3A = t;
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PLAT_OCRA = t;
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/* Write 1s to clear all timer function flags */
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/* Write 1s to clear all timer function flags */
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ETIFR |= (1 << ICF3) | (1 << OCF3A) | (1 << OCF3B) | (1 << TOV3) |
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PLAT_TIFR |=
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(1 << OCF3C);
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( (1 << PLAT_ICF)
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/* Enable interrupt on OCR3A match */
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| (1 << PLAT_OCFA)
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ETIMSK |= (1 << OCIE3A);
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| (1 << PLAT_OCFB)
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| (1 << PLAT_OCFC)
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#elif RTIMER_ARCH_PRESCALER
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| (1 << PLAT_TOV)
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/* Set compare register */
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);
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OCR1A = t;
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/* Enable interrupt on OCRXA match */
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TIFR |= (1 << ICF1) | (1 << OCF1A) | (1 << OCF1B) | (1 << TOV1);
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PLAT_TIMSK |= (1 << PLAT_OCIEA);
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TIMSK |= (1 << OCIE1A);
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#endif
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/* Restore interrupt state */
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/* Restore interrupt state */
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SREG = sreg;
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SREG = sreg;
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#endif /* RTIMER_ARCH_PRESCALER */
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#endif /* RTIMER_ARCH_PRESCALER */
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@ -293,11 +255,7 @@ uint32_t longhowlong;
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/* Adjust rtimer ticks if rtimer is enabled. TIMER3 is preferred, else TIMER1 */
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/* Adjust rtimer ticks if rtimer is enabled. TIMER3 is preferred, else TIMER1 */
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#if RTIMER_ARCH_PRESCALER
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#if RTIMER_ARCH_PRESCALER
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#ifdef TCNT3
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PLAT_TCNT += howlong;
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TCNT3 += howlong;
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#else
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TCNT1 += howlong;
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#endif
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#endif
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#endif
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ENERGEST_ON(ENERGEST_TYPE_CPU);
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ENERGEST_ON(ENERGEST_TYPE_CPU);
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#define RTIMER_ARCH_SECOND 0
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#define RTIMER_ARCH_SECOND 0
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#endif
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#endif
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#ifndef PLAT_TIMER
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/* By default use timer 3 if available. Fall back to timer1 if not. */
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#ifdef TCNT3
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#ifdef TCNT3
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#define rtimer_arch_now() (TCNT3)
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#define PLAT_TIMER 3
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#elif RTIMER_ARCH_PRESCALER
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#else
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#define rtimer_arch_now() (TCNT1)
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#define PLAT_TIMER 1
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#endif /* TCNT3 */
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#endif /* !PLAT_TIMER */
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#define _R_CONC_(_x,_y,_z) _x##_y##_z
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#define _C_R_CONC_(_X,_Y,_Z) _R_CONC_(_X,_Y,_Z)
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#define PLAT_ICF _C_R_CONC_(ICF,PLAT_TIMER,)
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#define PLAT_ICIE _C_R_CONC_(ICIE,PLAT_TIMER,)
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#define PLAT_OCFA _C_R_CONC_(OCF,PLAT_TIMER,A)
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#define PLAT_OCFB _C_R_CONC_(OCF,PLAT_TIMER,B)
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#define PLAT_OCFC _C_R_CONC_(OCF,PLAT_TIMER,C)
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#define PLAT_OCIEA _C_R_CONC_(OCIE,PLAT_TIMER,A)
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#define PLAT_OCIEB _C_R_CONC_(OCIE,PLAT_TIMER,B)
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#define PLAT_OCIEC _C_R_CONC_(OCIE,PLAT_TIMER,C)
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#define PLAT_OCRA _C_R_CONC_(OCR,PLAT_TIMER,A)
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#define PLAT_TCCRA _C_R_CONC_(TCCR,PLAT_TIMER,A)
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#define PLAT_TCCRB _C_R_CONC_(TCCR,PLAT_TIMER,B)
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#define PLAT_TCCRC _C_R_CONC_(TCCR,PLAT_TIMER,C)
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#define PLAT_TCNT _C_R_CONC_(TCNT,PLAT_TIMER,)
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#define PLAT_TIFR _C_R_CONC_(TIFR,PLAT_TIMER,)
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#define PLAT_TIMSK _C_R_CONC_(TIMSK,PLAT_TIMER,)
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#define PLAT_TOIE _C_R_CONC_(TOIE,PLAT_TIMER,)
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#define PLAT_TOV _C_R_CONC_(TOV,PLAT_TIMER,)
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#define PLAT_VECT _C_R_CONC_(TIMER,PLAT_TIMER,_COMPA_vect)
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#if RTIMER_ARCH_PRESCALER
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#define rtimer_arch_now() (PLAT_TCNT)
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#else
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#else
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#define rtimer_arch_now() (0)
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#define rtimer_arch_now() (0)
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#endif
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#endif
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/* some platforms don't have OCIEXC, we rely on the processor
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* definition to #define OCIEXC OCIEXB in that case. This won't hurt
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* since OCIEXC isn't used anyway.
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*/
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void rtimer_arch_sleep(rtimer_clock_t howlong);
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void rtimer_arch_sleep(rtimer_clock_t howlong);
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#endif /* RTIMER_ARCH_H_ */
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#endif /* RTIMER_ARCH_H_ */
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@ -29,7 +29,7 @@ CONTIKI_TARGET_SOURCEFILES += wiring_digital.c
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CONTIKIBOARD=.
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CONTIKIBOARD=.
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BOOTLOADER_START = 0x1F000
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BOOTLOADER_START = 0x1F000
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CONTIKI_PLAT_DEFS = -DF_CPU=16000000UL -DAUTO_CRC_PADDING=2
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CONTIKI_PLAT_DEFS = -DF_CPU=16000000UL -DAUTO_CRC_PADDING=2 -DPLAT_TIMER=5
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MCU=atmega128rfa1
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MCU=atmega128rfa1
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