Make HW timer for contiki rtimer configurable

... and configure osd platform to use timer 5. With the new
configuration we can use timer 3 for generating hardware PWM.
This commit is contained in:
Ralf Schlatterbeck 2014-05-31 16:17:07 +02:00
parent b4fb8c3f52
commit 4ceffb090d
3 changed files with 86 additions and 97 deletions

View file

@ -51,29 +51,24 @@
#include "rtimer-arch.h" #include "rtimer-arch.h"
#if defined(__AVR_ATmega1284P__) #if defined(__AVR_ATmega1284P__)
#define ETIMSK TIMSK3
#define ETIFR TIFR3
#define TICIE3 ICIE3
//Has no 'C', so we just set it to B. The code doesn't really use C so this //Has no 'C', so we just set it to B. The code doesn't really use C so this
//is safe to do but lets it compile. Probably should enable the warning if //is safe to do but lets it compile. Probably should enable the warning if
//it is ever used on other platforms. //it is ever used on other platforms.
//#warning no OCIE3C in timer3 architecture, hopefully it won't be needed! //#warning no OCIE3C in timer3 architecture, hopefully it won't be needed!
#define OCIE3C OCIE3B #define OCIE3C OCIE3B
#define OCF3C OCF3B #define OCF3C OCF3B
#define PLAT_TCCRC PLAT_TCCRB
#endif #endif
#if defined(__AVR_ATmega1281__) || defined(__AVR_AT90USB1287__) || defined(__AVR_ATmega128RFA1__) #if defined(__AVR_ATmega1281__) || defined(__AVR_AT90USB1287__) || defined(__AVR_ATmega128RFA1__)
#define ETIMSK TIMSK3
#define ETIFR TIFR3
#define TICIE3 ICIE3
#endif #endif
#if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega644__) #if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega644__)
#define TIMSK TIMSK1 //Has no 'C', so we just set it to B. The code doesn't really use C so this
#define TICIE1 ICIE1 //is safe to do but lets it compile.
#define TIFR TIFR1 #define OCIE1C OCIE1B
#define OCF1C OCF1B
#define PLAT_TCCRC PLAT_TCCRB
#endif #endif
/* Track flow through rtimer interrupts*/ /* Track flow through rtimer interrupts*/
@ -85,14 +80,19 @@ extern uint8_t debugflowsize,debugflow[DEBUGFLOWSIZE];
#endif #endif
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
#if defined(TCNT3) && RTIMER_ARCH_PRESCALER #if RTIMER_ARCH_PRESCALER
ISR (TIMER3_COMPA_vect) { ISR (PLAT_VECT) {
DEBUGFLOW('/'); DEBUGFLOW('/');
ENERGEST_ON(ENERGEST_TYPE_IRQ); ENERGEST_ON(ENERGEST_TYPE_IRQ);
/* Disable rtimer interrupts */ /* Disable rtimer interrupts */
ETIMSK &= ~((1 << OCIE3A) | (1 << OCIE3B) | (1 << TOIE3) | PLAT_TIMSK &=
(1 << TICIE3) | (1 << OCIE3C)); ~( (1 << PLAT_OCIEA)
| (1 << PLAT_OCIEB)
| (1 << PLAT_OCIEC)
| (1 << PLAT_TOIE)
| (1 << PLAT_ICIE)
);
#if RTIMER_CONF_NESTED_INTERRUPTS #if RTIMER_CONF_NESTED_INTERRUPTS
/* Enable nested interrupts. Allows radio interrupt during rtimer interrupt. */ /* Enable nested interrupts. Allows radio interrupt during rtimer interrupt. */
@ -106,17 +106,6 @@ ISR (TIMER3_COMPA_vect) {
ENERGEST_OFF(ENERGEST_TYPE_IRQ); ENERGEST_OFF(ENERGEST_TYPE_IRQ);
DEBUGFLOW('\\'); DEBUGFLOW('\\');
} }
#elif RTIMER_ARCH_PRESCALER
#warning "No Timer3 in rtimer-arch.c - using Timer1 instead"
ISR (TIMER1_COMPA_vect) {
DEBUGFLOW('/');
TIMSK &= ~((1<<TICIE1)|(1<<OCIE1A)|(1<<OCIE1B)|(1<<TOIE1));
rtimer_run_next();
DEBUGFLOW('\\');
}
#endif #endif
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
void void
@ -128,67 +117,45 @@ rtimer_arch_init(void)
sreg = SREG; sreg = SREG;
cli (); cli ();
#ifdef TCNT3
/* Disable all timer functions */ /* Disable all timer functions */
ETIMSK &= ~((1 << OCIE3A) | (1 << OCIE3B) | (1 << TOIE3) | PLAT_TIMSK &=
(1 << TICIE3) | (1 << OCIE3C)); ~( (1 << PLAT_OCIEA)
| (1 << PLAT_OCIEB)
| (1 << PLAT_OCIEC)
| (1 << PLAT_TOIE)
| (1 << PLAT_ICIE)
);
/* Write 1s to clear existing timer function flags */ /* Write 1s to clear existing timer function flags */
ETIFR |= (1 << ICF3) | (1 << OCF3A) | (1 << OCF3B) | (1 << TOV3) | PLAT_TIFR |=
(1 << OCF3C); ( (1 << PLAT_ICF)
| (1 << PLAT_OCFA)
| (1 << PLAT_OCFB)
| (1 << PLAT_OCFC)
| (1 << PLAT_TOV)
);
/* Default timer behaviour */ /* Default timer behaviour */
TCCR3A = 0; PLAT_TCCRA = 0;
TCCR3B = 0; PLAT_TCCRB = 0;
TCCR3C = 0; PLAT_TCCRC = 0;
/* Reset counter */ /* Reset counter */
TCNT3 = 0; PLAT_TCNT = 0;
#if RTIMER_ARCH_PRESCALER==1024 #if RTIMER_ARCH_PRESCALER==1024
TCCR3B |= 5; PLAT_TCCRB |= 5;
#elif RTIMER_ARCH_PRESCALER==256 #elif RTIMER_ARCH_PRESCALER==256
TCCR3B |= 4; PLAT_TCCRB |= 4;
#elif RTIMER_ARCH_PRESCALER==64 #elif RTIMER_ARCH_PRESCALER==64
TCCR3B |= 3; PLAT_TCCRB |= 3;
#elif RTIMER_ARCH_PRESCALER==8 #elif RTIMER_ARCH_PRESCALER==8
TCCR3B |= 2; PLAT_TCCRB |= 2;
#elif RTIMER_ARCH_PRESCALER==1 #elif RTIMER_ARCH_PRESCALER==1
TCCR3B |= 1; PLAT_TCCRB |= 1;
#else #else
#error Timer3 PRESCALER factor not supported. #error Timer PRESCALER factor not supported.
#endif #endif
#elif RTIMER_ARCH_PRESCALER
/* Leave timer1 alone if PRESCALER set to zero */
/* Obviously you can not then use rtimers */
TIMSK &= ~((1<<TICIE1)|(1<<OCIE1A)|(1<<OCIE1B)|(1<<TOIE1));
TIFR |= (1 << ICF1) | (1 << OCF1A) | (1 << OCF1B) | (1 << TOV1);
/* Default timer behaviour */
TCCR1A = 0;
TCCR1B = 0;
/* Reset counter */
TCNT1 = 0;
/* Start clock */
#if RTIMER_ARCH_PRESCALER==1024
TCCR1B |= 5;
#elif RTIMER_ARCH_PRESCALER==256
TCCR1B |= 4;
#elif RTIMER_ARCH_PRESCALER==64
TCCR1B |= 3;
#elif RTIMER_ARCH_PRESCALER==8
TCCR1B |= 2;
#elif RTIMER_ARCH_PRESCALER==1
TCCR1B |= 1;
#else
#error Timer1 PRESCALER factor not supported.
#endif
#endif /* TCNT3 */
/* Restore interrupt state */ /* Restore interrupt state */
SREG = sreg; SREG = sreg;
#endif /* RTIMER_ARCH_PRESCALER */ #endif /* RTIMER_ARCH_PRESCALER */
@ -203,23 +170,18 @@ rtimer_arch_schedule(rtimer_clock_t t)
sreg = SREG; sreg = SREG;
cli (); cli ();
DEBUGFLOW(':'); DEBUGFLOW(':');
#ifdef TCNT3
/* Set compare register */ /* Set compare register */
OCR3A = t; PLAT_OCRA = t;
/* Write 1s to clear all timer function flags */ /* Write 1s to clear all timer function flags */
ETIFR |= (1 << ICF3) | (1 << OCF3A) | (1 << OCF3B) | (1 << TOV3) | PLAT_TIFR |=
(1 << OCF3C); ( (1 << PLAT_ICF)
/* Enable interrupt on OCR3A match */ | (1 << PLAT_OCFA)
ETIMSK |= (1 << OCIE3A); | (1 << PLAT_OCFB)
| (1 << PLAT_OCFC)
#elif RTIMER_ARCH_PRESCALER | (1 << PLAT_TOV)
/* Set compare register */ );
OCR1A = t; /* Enable interrupt on OCRXA match */
TIFR |= (1 << ICF1) | (1 << OCF1A) | (1 << OCF1B) | (1 << TOV1); PLAT_TIMSK |= (1 << PLAT_OCIEA);
TIMSK |= (1 << OCIE1A);
#endif
/* Restore interrupt state */ /* Restore interrupt state */
SREG = sreg; SREG = sreg;
#endif /* RTIMER_ARCH_PRESCALER */ #endif /* RTIMER_ARCH_PRESCALER */
@ -293,11 +255,7 @@ uint32_t longhowlong;
/* Adjust rtimer ticks if rtimer is enabled. TIMER3 is preferred, else TIMER1 */ /* Adjust rtimer ticks if rtimer is enabled. TIMER3 is preferred, else TIMER1 */
#if RTIMER_ARCH_PRESCALER #if RTIMER_ARCH_PRESCALER
#ifdef TCNT3 PLAT_TCNT += howlong;
TCNT3 += howlong;
#else
TCNT1 += howlong;
#endif
#endif #endif
ENERGEST_ON(ENERGEST_TYPE_CPU); ENERGEST_ON(ENERGEST_TYPE_CPU);

View file

@ -58,14 +58,45 @@
#define RTIMER_ARCH_SECOND 0 #define RTIMER_ARCH_SECOND 0
#endif #endif
#ifndef PLAT_TIMER
/* By default use timer 3 if available. Fall back to timer1 if not. */
#ifdef TCNT3 #ifdef TCNT3
#define rtimer_arch_now() (TCNT3) #define PLAT_TIMER 3
#elif RTIMER_ARCH_PRESCALER #else
#define rtimer_arch_now() (TCNT1) #define PLAT_TIMER 1
#endif /* TCNT3 */
#endif /* !PLAT_TIMER */
#define _R_CONC_(_x,_y,_z) _x##_y##_z
#define _C_R_CONC_(_X,_Y,_Z) _R_CONC_(_X,_Y,_Z)
#define PLAT_ICF _C_R_CONC_(ICF,PLAT_TIMER,)
#define PLAT_ICIE _C_R_CONC_(ICIE,PLAT_TIMER,)
#define PLAT_OCFA _C_R_CONC_(OCF,PLAT_TIMER,A)
#define PLAT_OCFB _C_R_CONC_(OCF,PLAT_TIMER,B)
#define PLAT_OCFC _C_R_CONC_(OCF,PLAT_TIMER,C)
#define PLAT_OCIEA _C_R_CONC_(OCIE,PLAT_TIMER,A)
#define PLAT_OCIEB _C_R_CONC_(OCIE,PLAT_TIMER,B)
#define PLAT_OCIEC _C_R_CONC_(OCIE,PLAT_TIMER,C)
#define PLAT_OCRA _C_R_CONC_(OCR,PLAT_TIMER,A)
#define PLAT_TCCRA _C_R_CONC_(TCCR,PLAT_TIMER,A)
#define PLAT_TCCRB _C_R_CONC_(TCCR,PLAT_TIMER,B)
#define PLAT_TCCRC _C_R_CONC_(TCCR,PLAT_TIMER,C)
#define PLAT_TCNT _C_R_CONC_(TCNT,PLAT_TIMER,)
#define PLAT_TIFR _C_R_CONC_(TIFR,PLAT_TIMER,)
#define PLAT_TIMSK _C_R_CONC_(TIMSK,PLAT_TIMER,)
#define PLAT_TOIE _C_R_CONC_(TOIE,PLAT_TIMER,)
#define PLAT_TOV _C_R_CONC_(TOV,PLAT_TIMER,)
#define PLAT_VECT _C_R_CONC_(TIMER,PLAT_TIMER,_COMPA_vect)
#if RTIMER_ARCH_PRESCALER
#define rtimer_arch_now() (PLAT_TCNT)
#else #else
#define rtimer_arch_now() (0) #define rtimer_arch_now() (0)
#endif #endif
/* some platforms don't have OCIEXC, we rely on the processor
* definition to #define OCIEXC OCIEXB in that case. This won't hurt
* since OCIEXC isn't used anyway.
*/
void rtimer_arch_sleep(rtimer_clock_t howlong); void rtimer_arch_sleep(rtimer_clock_t howlong);
#endif /* RTIMER_ARCH_H_ */ #endif /* RTIMER_ARCH_H_ */

View file

@ -29,7 +29,7 @@ CONTIKI_TARGET_SOURCEFILES += wiring_digital.c
CONTIKIBOARD=. CONTIKIBOARD=.
BOOTLOADER_START = 0x1F000 BOOTLOADER_START = 0x1F000
CONTIKI_PLAT_DEFS = -DF_CPU=16000000UL -DAUTO_CRC_PADDING=2 CONTIKI_PLAT_DEFS = -DF_CPU=16000000UL -DAUTO_CRC_PADDING=2 -DPLAT_TIMER=5
MCU=atmega128rfa1 MCU=atmega128rfa1