OpenOCD configuration for SAM7S. Should be merged into ../../common/openocd
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1
cpu/arm/at91sam7s/openocd/AT91SAM7x_init.script
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cpu/arm/at91sam7s/openocd/AT91SAM7x_init.script
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arm7_9 force_hw_bkpts enable
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cpu/arm/at91sam7s/openocd/arm7_wig.cfg
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cpu/arm/at91sam7s/openocd/arm7_wig.cfg
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# Change the default telnet port...
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telnet_port 4444
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# GDB connects here
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gdb_port 3333
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# GDB can also flash my flash!
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gdb_memory_map enable
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gdb_flash_program enable
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# Wiggler interface
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interface parport
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parport_port 0
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parport_cable wiggler
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jtag_speed 0
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set CPUTAPID 0x3f0f0f0f
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source [find target/sam7s.cfg]
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30
cpu/arm/at91sam7s/openocd/arm7_wig_flash.cfg
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cpu/arm/at91sam7s/openocd/arm7_wig_flash.cfg
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#daemon configuration
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telnet_port 4444
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gdb_port 3333
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#interface
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interface parport
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parport_port 0
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parport_cable wiggler
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jtag_speed 0
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config srst_only
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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#target configuration
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daemon_startup reset
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#target <type> <startup mode>
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#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
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target arm7tdmi little run_and_init 0 arm7tdmi_r4
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#target_script 0 reset h2294_init.script
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target_script 0 reset openocd_flash
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run_and_halt_time 0 30
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working_area 0 0x40000000 0x4000 nobackup
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#flash configuration
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#flash bank lpc2000 0x0 0x40000 0 0 lpc2000_v1 0 14765 calc_checksum
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#flash bank cfi 0x80000000 0x400000 2 2 0
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flash bank at91sam7 0 0 0 0 0
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30
cpu/arm/at91sam7s/openocd/arm7_wig_reset.cfg
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cpu/arm/at91sam7s/openocd/arm7_wig_reset.cfg
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#daemon configuration
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telnet_port 4444
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gdb_port 3333
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#interface
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interface parport
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parport_port 0
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parport_cable wiggler
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jtag_speed 0
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config srst_only
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag_device 4 0x1 0xf 0xe
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#target configuration
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daemon_startup reset
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#target <type> <startup mode>
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#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
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target arm7tdmi little run_and_init 0 arm7tdmi_r4
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#target_script 0 reset h2294_init.script
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target_script 0 reset openocd_reset
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run_and_halt_time 0 30
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working_area 0 0x40000000 0x4000 nobackup
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#flash configuration
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#flash bank lpc2000 0x0 0x40000 0 0 lpc2000_v1 0 14765 calc_checksum
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#flash bank cfi 0x80000000 0x400000 2 2 0
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flash bank at91sam7 0 0 0 0 0
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cpu/arm/at91sam7s/openocd/openocd_flash
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cpu/arm/at91sam7s/openocd/openocd_flash
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poll
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mww 0xffffff64 0x5a000004
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sleep 250
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mww 0xffffff64 0x5a002004
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sleep 250
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flash probe 0
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flash write 0 /tmp/openocd_write.bin 0x0
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reset run
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sleep 500
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shutdown
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cpu/arm/at91sam7s/openocd/openocd_reset
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cpu/arm/at91sam7s/openocd/openocd_reset
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poll
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reset run
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sleep 500
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shutdown
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cpu/arm/at91sam7s/openocd/target/sam7s.cfg
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cpu/arm/at91sam7s/openocd/target/sam7s.cfg
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# ATMEL sam7s
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME sam7s
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# force an error till we get a good number
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set _CPUTAPID 0xffffffff
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}
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config srst_only
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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# The target
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set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
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target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
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$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
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flash bank at91sam7 0 0 0 0 0
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