initial try at init entry execution

This commit is contained in:
Mariano Alvira 2009-04-16 10:51:20 -04:00
parent 99c91d7e3e
commit 424761f23d
5 changed files with 76 additions and 10 deletions

View file

@ -60,9 +60,9 @@ ALL = $(TESTS:.c=.srec) $(TESTS:.c=.bin) $(TESTS:.c=.dis)
all: src/start.o $(ALL) all: src/start.o $(ALL)
tests/nvm-read.obj: src/maca.o tests/nvm-read.obj: src/maca.o src/nvm.o
tests/rftest-rx.obj: src/maca.o tests/rftest-rx.obj: src/maca.o src/nvm.o
tests/rftest-tx.obj: src/maca.o tests/rftest-tx.obj: src/maca.o src/nvm.o
%.srec: %.obj %.srec: %.obj
$(OBJCOPY) ${OBJCFLAGS} -O srec $< $@ $(OBJCOPY) ${OBJCFLAGS} -O srec $< $@

View file

@ -5422,8 +5422,10 @@ Disassembly of section P2:
4031c6: 2900 cmp r1, #0 4031c6: 2900 cmp r1, #0
4031c8: d1fb bne.n 4031c2 <SMAC_InitExecuteEntry+0x1e> 4031c8: d1fb bne.n 4031c2 <SMAC_InitExecuteEntry+0x1e>
4031ca: e7f2 b.n 4031b2 <SMAC_InitExecuteEntry+0xe> 4031ca: e7f2 b.n 4031b2 <SMAC_InitExecuteEntry+0xe>
4031cc: 2901 cmp r1, #1 // at this point r1 is between 1 and 15 inclusive 4031cc: 2901 cmp r1, #1 // 3: at this point r1 is between 1 and 15 inclusive
4031ce: d118 bne.n 403202 <SMAC_InitExecuteEntry+0x5e> // if !=1 return 4031ce: d118 bne.n 403202 <SMAC_InitExecuteEntry+0x5e> // if !=1 return
4031e2: 2004 movs r0, #4 // return 4 bytes processed
4031e4: 4770 bx lr
0x00000001 command 0x00000001 command
0xaaaaaaaa 0xaaaaaaaa
@ -5445,8 +5447,6 @@ if (buf[0] == 0x00000001) {
*buf[2] = (*buf[2] & ~buf[1]) | (buf[3] & buf[1]); *buf[2] = (*buf[2] & ~buf[1]) | (buf[3] & buf[1]);
} }
4031e2: 2004 movs r0, #4 // return 4 bytes processed
4031e4: 4770 bx lr
4031e6: 4a09 ldr r2, [pc, #36] (40320c <SMAC_InitExecuteEntry+0x68>) //2: r2=0x0000fff1 4031e6: 4a09 ldr r2, [pc, #36] (40320c <SMAC_InitExecuteEntry+0x68>) //2: r2=0x0000fff1
4031e8: 4291 cmp r1, r2 // r1 >=16 4031e8: 4291 cmp r1, r2 // r1 >=16
4031ea: d20a bcs.n 403202 <SMAC_InitExecuteEntry+0x5e> // if r1 >= 0xfff1 then return 0 4031ea: d20a bcs.n 403202 <SMAC_InitExecuteEntry+0x5e> // if r1 >= 0xfff1 then return 0
@ -5460,7 +5460,7 @@ if (buf[0] == 0x00000001) {
4031fa: 4a06 ldr r2, [pc, #24] (403214 <SMAC_InitExecuteEntry+0x70>) r2 = &u8RamValues 4031fa: 4a06 ldr r2, [pc, #24] (403214 <SMAC_InitExecuteEntry+0x70>) r2 = &u8RamValues
4031fc: 6800 ldr r0, [r0, #0] // r0 = next value in buffer 2nd half of pair 4031fc: 6800 ldr r0, [r0, #0] // r0 = next value in buffer 2nd half of pair
4031fe: 5450 strb r0, [r2, r1] // store this in u8RamValues 4031fe: 5450 strb r0, [r2, r1] // store this in u8RamValues
403200: e7d7 b.n 4031b2 <SMAC_InitExecuteEntry+0xe> 403200: e7d7 b.n 4031b2 <SMAC_InitExecuteEntry+0xe> // return 2
403202: 2000 movs r0, #0 // return 0 403202: 2000 movs r0, #0 // return 0
403204: 4770 bx lr 403204: 4770 bx lr
403206: 46c0 nop (mov r8, r8) 403206: 46c0 nop (mov r8, r8)

View file

@ -397,6 +397,7 @@ typedef union maca_maskirq_reg_tag
uint32_t Reg; uint32_t Reg;
} maca_maskirq_reg_t; } maca_maskirq_reg_t;
#define _is_action_complete_interrupt(x) (0 != (maca_irq_acpl & x)) #define _is_action_complete_interrupt(x) (0 != (maca_irq_acpl & x))
#define _is_filter_failed_interrupt(x) (0 != (maca_irq_flt & x)) #define _is_filter_failed_interrupt(x) (0 != (maca_irq_flt & x))

View file

@ -1,6 +1,8 @@
#ifndef NVM_H #ifndef NVM_H
#define NVM_H #define NVM_H
#include "embedded_types.h"
typedef enum typedef enum
{ {
gNvmType_NoNvm_c, gNvmType_NoNvm_c,
@ -34,7 +36,7 @@ typedef enum
/* ROM code seems to be THUMB */ /* ROM code seems to be THUMB */
/* need to be in a THUMB block before calling them */ /* need to be in a THUMB block before calling them */
volatile nvmErr_t (*nvm_detect)(nvmInterface_t nvmInterface,nvmType_t* pNvmType) = 0x00006cb9; extern volatile nvmErr_t (*nvm_detect)(nvmInterface_t nvmInterface,nvmType_t* pNvmType);
volatile nvmErr_t (*nvm_read)(nvmInterface_t nvmInterface , nvmType_t nvmType , void *pDest, uint32_t address, uint32_t numBytes) = 0x00006d69; extern volatile nvmErr_t (*nvm_read)(nvmInterface_t nvmInterface , nvmType_t nvmType , void *pDest, uint32_t address, uint32_t numBytes);
volatile void(*nvm_setsvar)(uint32_t zero_for_awesome) = 0x00007085; extern volatile void(*nvm_setsvar)(uint32_t zero_for_awesome);
#endif //NVM_H #endif //NVM_H

View file

@ -1,8 +1,11 @@
#include "embedded_types.h" #include "embedded_types.h"
#include "maca.h" #include "maca.h"
#include "nvm.h"
#define reg(x) (*(volatile uint32_t *)(x)) #define reg(x) (*(volatile uint32_t *)(x))
static uint8_t ram_values[4];
void init_phy(void) void init_phy(void)
{ {
volatile uint32_t cnt; volatile uint32_t cnt;
@ -347,6 +350,66 @@ void set_channel(uint8_t chan) {
/* duh! */ /* duh! */
} }
#define ROM_END 0x0013ffff
#define ENTRY_EOF 0x00000e0f
/* processes up to 4 words of initialization entries */
/* returns the number of words processed */
uint8_t exec_init_entry(uint32_t *entries, uint8_t *valbuf)
{
volatile uint32_t i;
if(entries[0] <= ROM_END) {
if (entries[0] == 0) {
/* do delay command*/
for(i=0; i<entries[1]; i++) { continue; }
return 2;
} else if (entries[0] == 1) {
/* do bit set/clear command*/
reg(entries[2]) = (reg(entries[2]) & ~entries[1]) | (entries[3] & entries[1]);
return 4;
} else if ((entries[0] >= 16) &&
(entries[0] < 0xfff1)) {
/* store bytes in valbuf */
valbuf[(entries[0]>>4)-1] = entries[1];
return 2;
} else if (entries[0] == ENTRY_EOF) {
return 0;
} else {
/* invalid command code */
return 0;
}
} else { /* address isn't in ROM space */
/* do store value in address command */
reg(entries[0]) = entries[1];
return 2;
}
}
#define FLASH_INIT_MAGIC 0x00000abc
uint32_t init_from_flash(uint32_t addr) {
nvmType_t type=0;
nvmErr_t err;
uint32_t buf[4];
uint16_t len;
uint32_t i=0;
err = nvm_detect(gNvmInternalInterface_c, &type);
nvm_setsvar(0);
err = nvm_read(gNvmInternalInterface_c, type, (uint8_t *)buf, addr, 8);
i+=8;
if(buf[0] == FLASH_INIT_MAGIC) {
len = buf[1] & 0x0000ffff;
while(i<len) {
err = nvm_read(gNvmInternalInterface_c, type, (uint8_t *)buf, addr+i, 32);
i += exec_init_entry(buf, ram_values);
}
return i;
} else {
return 0;
}
}
/* /*
* Do the ABORT-Wait-NOP-Wait sequence in order to prevent MACA malfunctioning. * Do the ABORT-Wait-NOP-Wait sequence in order to prevent MACA malfunctioning.
* This seqeunce is synchronous and no interrupts should be triggered when it is done. * This seqeunce is synchronous and no interrupts should be triggered when it is done.