working on initfromflash
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bc68d77b66
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40207dc533
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@ -145,36 +145,29 @@ that u8RamValues isn't important since I just set it's value.
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That means I only have InitFromFlash to replace now!
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That means I only have InitFromFlash to replace now!
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Actually, I should test if that is necessary --- I still find it a
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little hard to believe that they put essential data on NVM --- except
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they could set codeprotect so that clods won't erase it on accident.
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/*
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See PLM/LibInterface/NVM.h for some docs. Looks like they put a
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After init from flash and flyback settings
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standard SST, ST, or Atmel spi flash in there (note the comment about
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ram_init_val - 004055d0
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continuous read mode).
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004055d0
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base +0 +4 +8 +c +10 +14 +18 +1c
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0000 00000000 00000000 00000000 00000000 00000000 00000000 80009400 00000017
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u8RamValues
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MACPHY.a might use a ROM service for the flash init:
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00405424
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base +0 +4 +8 +c +10 +14 +18 +1c
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0000 0400009b 00000000 00000000 00010000 ff000000 00000000 00000000 00000000
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*/
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/*
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0000f97c g F *ABS* 00000000 InitFromFlash
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40308e: f000 f86d bl 40316c <get_ctov> //get_ctov(0,0x9b)
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403092: 1929 adds r1, r5, r4 // r4 = 0, r5 is &ram_init_val
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ac: 4668 mov r0, sp
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403094: 7208 strb r0, [r1, #8]
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ae: f7ff fffe bl 0 <GetInitTranslationTablePtr>
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403096: 1c64 adds r4, r4, #1 // r4=1
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b2: 4669 mov r1, sp
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403098: 0620 lsls r0, r4, #24
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b4: 780a ldrb r2, [r1, #0]
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40309a: 0e00 lsrs r0, r0, #24
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b6: 0001 lsls r1, r0, #0
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40309c: 2810 cmp r0, #16 //
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b8: 20f8 movs r0, #248
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40309e: d3f3 bcc.n 403088 <RadioInit+0xcc> // branch if higher
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ba: 0240 lsls r0, r0, #9
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4030a0: b001 add sp, #4
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bc: f7ff fffe bl 0 <InitFromFlash>
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4030a2: 9804 ldr r0, [sp, #16]
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4030a4: bcf0 pop {r4, r5, r6, r7}
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uint32_t InitFromFlash(uint32_t nvmAddress, uint32_t nLength);
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4030a6: b001 add sp, #4
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4030a8: 4700 bx r0
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Which looks like InitFromFlash(0x1F00,?);
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4030aa: 46c0 nop (mov r8, r8)
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*/
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66
doc/ws.dis
66
doc/ws.dis
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@ -5460,37 +5460,37 @@ Disassembly of section P2:
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00403218 <SMAC_InitFromFlash>:
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00403218 <SMAC_InitFromFlash>:
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403218: b570 push {r4, r5, r6, lr}
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403218: b570 push {r4, r5, r6, lr}
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40321a: b08a sub sp, #40
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40321a: b08a sub sp, #40
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40321c: 0006 lsls r6, r0, #0
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40321c: 0006 lsls r6, r0, #0 // r0 has 0x1F000 from call in radioinit
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40321e: a804 add r0, sp, #16
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40321e: a804 add r0, sp, #16
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403220: 2102 movs r1, #2
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403220: 2102 movs r1, #2
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403222: 7001 strb r1, [r0, #0]
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403222: 7001 strb r1, [r0, #0] // *0x1F000 = 2;
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403224: 2101 movs r1, #1
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403224: 2101 movs r1, #1
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403226: 7101 strb r1, [r0, #4]
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403226: 7101 strb r1, [r0, #4] // *0x1F000 = 1;
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403228: f400 fce4 bl 3bf4 <CRM_VRegCntl>
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403228: f400 fce4 bl 3bf4 <CRM_VRegCntl> // call to ROM: I assume this turns on the NVM reg
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40322c: 482b ldr r0, [pc, #172] (4032dc <SMAC_InitFromFlash+0xc4>)
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40322c: 482b ldr r0, [pc, #172] (4032dc <SMAC_InitFromFlash+0xc4>) r0 = &u32SystemClock
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40322e: 6800 ldr r0, [r0, #0]
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40322e: 6800 ldr r0, [r0, #0] // r0 = u32SystemClock
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403230: 2107 movs r1, #7
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403230: 2107 movs r1, #7 // r1 = 7
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403232: f7fd fb8d bl 400950 <?Veneer (3) for __aeabi_uidivmod>
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403232: f7fd fb8d bl 400950 <?Veneer (3) for __aeabi_uidivmod> //divide clock by 7?
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403236: 9001 str r0, [sp, #4]
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403236: 9001 str r0, [sp, #4]
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403238: 9801 ldr r0, [sp, #4]
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403238: 9801 ldr r0, [sp, #4] // loop: r0 has result
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40323a: 1e41 subs r1, r0, #1
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40323a: 1e41 subs r1, r0, #1 // r1 = result - 1
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40323c: 9101 str r1, [sp, #4]
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40323c: 9101 str r1, [sp, #4] // r1 goes on the stack
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40323e: 2800 cmp r0, #0
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40323e: 2800 cmp r0, #0 // check if it's 0
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403240: d1fa bne.n 403238 <SMAC_InitFromFlash+0x20>
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403240: d1fa bne.n 403238 <SMAC_InitFromFlash+0x20> //go to loop if not zero, delay for vreg
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403242: 4669 mov r1, sp
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403242: 4669 mov r1, sp
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403244: f403 fd38 bl 6cb8 <NVM_Detect>
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403244: f403 fd38 bl 6cb8 <NVM_Detect> //call to ROM, looks like it returns 0 on fail and a pointer otherwise
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403248: 2800 cmp r0, #0
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403248: 2800 cmp r0, #0 //0?
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40324a: d103 bne.n 403254 <SMAC_InitFromFlash+0x3c>
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40324a: d103 bne.n 403254 <SMAC_InitFromFlash+0x3c> // branch to return0:
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40324c: 4668 mov r0, sp
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40324c: 4668 mov r0, sp
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40324e: 7800 ldrb r0, [r0, #0]
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40324e: 7800 ldrb r0, [r0, #0] // r0 gets where the return value points
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403250: 2800 cmp r0, #0
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403250: 2800 cmp r0, #0 // return 0 if 0
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403252: d101 bne.n 403258 <SMAC_InitFromFlash+0x40>
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403252: d101 bne.n 403258 <SMAC_InitFromFlash+0x40> //otherwise branch to 1:
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403254: 2000 movs r0, #0
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403254: 2000 movs r0, #0 //return0:
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403256: e03e b.n 4032d6 <SMAC_InitFromFlash+0xbe>
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403256: e03e b.n 4032d6 <SMAC_InitFromFlash+0xbe> // branch to exit:
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403258: 2000 movs r0, #0
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403258: 2000 movs r0, #0 //1: r0 = 0
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40325a: f403 ff13 bl 7084 <NVM_SetSVar>
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40325a: f403 ff13 bl 7084 <NVM_SetSVar> //call to ROM: might need to dump this one...
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40325e: 2008 movs r0, #8
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40325e: 2008 movs r0, #8 // r0 gets 8;
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403260: b501 push {r0, lr}
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403260: b501 push {r0, lr} // looks like stack setup for call to NVM_Read
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403262: 0033 lsls r3, r6, #0
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403262: 0033 lsls r3, r6, #0
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403264: aa04 add r2, sp, #16
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403264: aa04 add r2, sp, #16
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403266: a802 add r0, sp, #8
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403266: a802 add r0, sp, #8
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@ -5498,19 +5498,19 @@ Disassembly of section P2:
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40326a: 2000 movs r0, #0
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40326a: 2000 movs r0, #0
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40326c: f403 fd7c bl 6d68 <NVM_Read>
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40326c: f403 fd7c bl 6d68 <NVM_Read>
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403270: b002 add sp, #8
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403270: b002 add sp, #8
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403272: 2800 cmp r0, #0
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403272: 2800 cmp r0, #0 // did it return 0?
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403274: d109 bne.n 40328a <SMAC_InitFromFlash+0x72>
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403274: d109 bne.n 40328a <SMAC_InitFromFlash+0x72> //if != branch to 2:
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403276: 9802 ldr r0, [sp, #8]
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403276: 9802 ldr r0, [sp, #8] //r0 gets something on the stack
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403278: 4919 ldr r1, [pc, #100] (4032e0 <SMAC_InitFromFlash+0xc8>)
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403278: 4919 ldr r1, [pc, #100] (4032e0 <SMAC_InitFromFlash+0xc8>) //r1 = 0x00000abc
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40327a: 4288 cmp r0, r1
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40327a: 4288 cmp r0, r1
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40327c: d105 bne.n 40328a <SMAC_InitFromFlash+0x72>
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40327c: d105 bne.n 40328a <SMAC_InitFromFlash+0x72> //branch to 2: if !=
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40327e: a802 add r0, sp, #8
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40327e: a802 add r0, sp, #8
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403280: 88c1 ldrh r1, [r0, #6]
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403280: 88c1 ldrh r1, [r0, #6]
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403282: 22ff movs r2, #255
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403282: 22ff movs r2, #255
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403284: 1c92 adds r2, r2, #2
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403284: 1c92 adds r2, r2, #2
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403286: 4291 cmp r1, r2
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403286: 4291 cmp r1, r2
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403288: d303 bcc.n 403292 <SMAC_InitFromFlash+0x7a>
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403288: d303 bcc.n 403292 <SMAC_InitFromFlash+0x7a>
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40328a: 2001 movs r0, #1
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40328a: 2001 movs r0, #1 // 2:
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40328c: f403 fefa bl 7084 <NVM_SetSVar>
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40328c: f403 fefa bl 7084 <NVM_SetSVar>
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403290: e7e0 b.n 403254 <SMAC_InitFromFlash+0x3c>
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403290: e7e0 b.n 403254 <SMAC_InitFromFlash+0x3c>
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403292: 2408 movs r4, #8
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403292: 2408 movs r4, #8
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@ -5518,7 +5518,7 @@ Disassembly of section P2:
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403296: 1f2d subs r5, r5, #4
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403296: 1f2d subs r5, r5, #4
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403298: e006 b.n 4032a8 <SMAC_InitFromFlash+0x90>
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403298: e006 b.n 4032a8 <SMAC_InitFromFlash+0x90>
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40329a: a806 add r0, sp, #24
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40329a: a806 add r0, sp, #24
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40329c: f7ff ff82 bl 4031a4 <SMAC_InitExecuteEntry>
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40329c: f7ff ff82 bl 4031a4 <SMAC_InitExecuteEntry> // so it looks like flash has entries it exectues...
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4032a0: 2800 cmp r0, #0
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4032a0: 2800 cmp r0, #0
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4032a2: d00f beq.n 4032c4 <SMAC_InitFromFlash+0xac>
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4032a2: d00f beq.n 4032c4 <SMAC_InitFromFlash+0xac>
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4032a4: 0080 lsls r0, r0, #2
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4032a4: 0080 lsls r0, r0, #2
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@ -5543,7 +5543,7 @@ Disassembly of section P2:
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4032ce: 2001 movs r0, #1
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4032ce: 2001 movs r0, #1
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4032d0: f403 fed8 bl 7084 <NVM_SetSVar>
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4032d0: f403 fed8 bl 7084 <NVM_SetSVar>
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4032d4: 1d20 adds r0, r4, #4
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4032d4: 1d20 adds r0, r4, #4
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4032d6: b00a add sp, #40
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4032d6: b00a add sp, #40 //exit:
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4032d8: e01c b.n 403314 <SMAC_InitFromMemory+0x30>
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4032d8: e01c b.n 403314 <SMAC_InitFromMemory+0x30>
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4032da: 46c0 nop (mov r8, r8)
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4032da: 46c0 nop (mov r8, r8)
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4032dc: 00405448 .word 0x00405448
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4032dc: 00405448 .word 0x00405448
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