Changed to monitor the UART transmitter buffer ready flag instead of the UART transmitter empty flag. This almost doubles the speed of transmitting data to CC2420. Patch by James Brown.
This commit is contained in:
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ebd91b9f9d
commit
3a8ee769cb
3 changed files with 32 additions and 26 deletions
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@ -1,5 +1,5 @@
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/* -*- C -*- */
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/* -*- C -*- */
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/* @(#)$Id: spi.h,v 1.4 2007/11/18 12:27:44 ksb Exp $ */
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/* @(#)$Id: spi.h,v 1.5 2009/08/31 12:06:34 nifi Exp $ */
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#ifndef SPI_H
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#ifndef SPI_H
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#define SPI_H
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#define SPI_H
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@ -20,8 +20,8 @@ void spi_init(void);
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#define FASTSPI_TX(x)\
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#define FASTSPI_TX(x)\
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do {\
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do {\
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SPI_WAITFOREOTxBUF();\
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SPI_TXBUF = x;\
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SPI_TXBUF = x;\
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SPI_WAITFOREOTx();\
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} while(0)
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} while(0)
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#define FASTSPI_RX(x)\
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#define FASTSPI_RX(x)\
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@ -46,6 +46,7 @@ void spi_init(void);
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for (spiCnt = 0; spiCnt < (c); spiCnt++) {\
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for (spiCnt = 0; spiCnt < (c); spiCnt++) {\
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FASTSPI_TX(((u8_t*)(p))[spiCnt]);\
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FASTSPI_TX(((u8_t*)(p))[spiCnt]);\
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}\
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}\
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SPI_WAITFOREOTx();\
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} while(0)
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} while(0)
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@ -93,6 +94,7 @@ void spi_init(void);
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FASTSPI_TX_ADDR(a);\
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FASTSPI_TX_ADDR(a);\
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FASTSPI_TX((u8_t) ((v) >> 8));\
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FASTSPI_TX((u8_t) ((v) >> 8));\
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FASTSPI_TX((u8_t) (v));\
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FASTSPI_TX((u8_t) (v));\
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SPI_WAITFOREOTx();\
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SPI_DISABLE();\
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SPI_DISABLE();\
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} while (0)
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} while (0)
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@ -133,6 +135,7 @@ void spi_init(void);
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for (i = 0; i < (c); i++) {\
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for (i = 0; i < (c); i++) {\
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FASTSPI_TX(((u8_t*)(p))[i]);\
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FASTSPI_TX(((u8_t*)(p))[i]);\
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}\
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}\
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SPI_WAITFOREOTx();\
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SPI_DISABLE();\
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SPI_DISABLE();\
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} while (0)
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} while (0)
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@ -142,6 +145,7 @@ void spi_init(void);
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for (u8_t spiCnt = 0; spiCnt < (c); spiCnt++) {\
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for (u8_t spiCnt = 0; spiCnt < (c); spiCnt++) {\
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FASTSPI_TX(((u8_t*)(p))[spiCnt]);\
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FASTSPI_TX(((u8_t*)(p))[spiCnt]);\
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}\
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}\
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SPI_WAITFOREOTx();\
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} while (0)
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} while (0)
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#define FASTSPI_READ_FIFO_BYTE(b)\
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#define FASTSPI_READ_FIFO_BYTE(b)\
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@ -208,6 +212,7 @@ void spi_init(void);
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for (n = 0; n < (c); n++) {\
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for (n = 0; n < (c); n++) {\
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FASTSPI_TX(((u8_t*)(p))[n]);\
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FASTSPI_TX(((u8_t*)(p))[n]);\
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}\
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}\
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SPI_WAITFOREOTx();\
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SPI_DISABLE();\
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SPI_DISABLE();\
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} while (0)
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} while (0)
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@ -1,5 +1,5 @@
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/* -*- C -*- */
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/* -*- C -*- */
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/* @(#)$Id: contiki-conf.h,v 1.57 2009/06/29 09:54:39 nifi Exp $ */
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/* @(#)$Id: contiki-conf.h,v 1.58 2009/08/31 12:06:35 nifi Exp $ */
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#ifndef CONTIKI_CONF_H
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#ifndef CONTIKI_CONF_H
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#define CONTIKI_CONF_H
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#define CONTIKI_CONF_H
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@ -170,10 +170,12 @@ typedef unsigned long off_t;
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#define SPI_TXBUF U0TXBUF
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#define SPI_TXBUF U0TXBUF
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#define SPI_RXBUF U0RXBUF
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#define SPI_RXBUF U0RXBUF
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/* USART0 Tx buffer ready? */
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/* USART0 Tx ready? */
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#define SPI_WAITFOREOTx() while ((U0TCTL & TXEPT) == 0)
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#define SPI_WAITFOREOTx() while ((U0TCTL & TXEPT) == 0)
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/* USART0 Rx buffer ready? */
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/* USART0 Rx buffer ready? */
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#define SPI_WAITFOREORx() while ((IFG1 & URXIFG0) == 0)
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#define SPI_WAITFOREORx() while ((IFG1 & URXIFG0) == 0)
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/* USART0 Tx buffer ready? */
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#define SPI_WAITFOREOTxBUF() while ((IFG1 & UTXIFG0) == 0)
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#define SCK 1 /* P3.1 - Output: SPI Serial Clock (SCLK) */
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#define SCK 1 /* P3.1 - Output: SPI Serial Clock (SCLK) */
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#define MOSI 2 /* P3.2 - Output: SPI Master out - slave in (MOSI) */
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#define MOSI 2 /* P3.2 - Output: SPI Master out - slave in (MOSI) */
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@ -26,7 +26,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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* SUCH DAMAGE.
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*
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*
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* @(#)$Id: xmem.c,v 1.8 2009/05/11 15:26:24 nvt-se Exp $
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* @(#)$Id: xmem.c,v 1.9 2009/08/31 12:06:35 nifi Exp $
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*/
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*/
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/**
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/**
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@ -70,12 +70,6 @@
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#define SPI_FLASH_INS_RES 0xab
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#define SPI_FLASH_INS_RES 0xab
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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static void
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static void
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spi_tx(unsigned byte)
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{
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FASTSPI_TX(byte);
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}
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/*---------------------------------------------------------------------------*/
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static void
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write_enable(void)
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write_enable(void)
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{
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{
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int s;
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int s;
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@ -83,7 +77,8 @@ write_enable(void)
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s = splhigh();
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s = splhigh();
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SPI_FLASH_ENABLE();
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SPI_FLASH_ENABLE();
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spi_tx(SPI_FLASH_INS_WREN);
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FASTSPI_TX(SPI_FLASH_INS_WREN);
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SPI_WAITFOREOTx();
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SPI_FLASH_DISABLE();
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SPI_FLASH_DISABLE();
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splx(s);
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splx(s);
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@ -99,7 +94,8 @@ read_status_register(void)
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s = splhigh();
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s = splhigh();
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SPI_FLASH_ENABLE();
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SPI_FLASH_ENABLE();
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spi_tx(SPI_FLASH_INS_RDSR);
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FASTSPI_TX(SPI_FLASH_INS_RDSR);
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SPI_WAITFOREOTx();
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FASTSPI_CLEAR_RX();
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FASTSPI_CLEAR_RX();
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FASTSPI_RX(u);
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FASTSPI_RX(u);
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@ -137,10 +133,11 @@ erase_sector(unsigned long offset)
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s = splhigh();
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s = splhigh();
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SPI_FLASH_ENABLE();
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SPI_FLASH_ENABLE();
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spi_tx(SPI_FLASH_INS_SE);
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FASTSPI_TX(SPI_FLASH_INS_SE);
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spi_tx(offset >> 16); /* MSB */
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FASTSPI_TX(offset >> 16); /* MSB */
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spi_tx(offset >> 8);
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FASTSPI_TX(offset >> 8);
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spi_tx(offset >> 0); /* LSB */
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FASTSPI_TX(offset >> 0); /* LSB */
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SPI_WAITFOREOTx();
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SPI_FLASH_DISABLE();
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SPI_FLASH_DISABLE();
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splx(s);
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splx(s);
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@ -174,10 +171,11 @@ xmem_pread(void *_p, int size, unsigned long offset)
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s = splhigh();
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s = splhigh();
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SPI_FLASH_ENABLE();
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SPI_FLASH_ENABLE();
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spi_tx(SPI_FLASH_INS_READ);
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FASTSPI_TX(SPI_FLASH_INS_READ);
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spi_tx(offset >> 16); /* MSB */
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FASTSPI_TX(offset >> 16); /* MSB */
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spi_tx(offset >> 8);
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FASTSPI_TX(offset >> 8);
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spi_tx(offset >> 0); /* LSB */
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FASTSPI_TX(offset >> 0); /* LSB */
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SPI_WAITFOREOTx();
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FASTSPI_CLEAR_RX();
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FASTSPI_CLEAR_RX();
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for(; p < end; p++) {
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for(; p < end; p++) {
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s = splhigh();
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s = splhigh();
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SPI_FLASH_ENABLE();
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SPI_FLASH_ENABLE();
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spi_tx(SPI_FLASH_INS_PP);
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FASTSPI_TX(SPI_FLASH_INS_PP);
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spi_tx(offset >> 16); /* MSB */
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FASTSPI_TX(offset >> 16); /* MSB */
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spi_tx(offset >> 8);
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FASTSPI_TX(offset >> 8);
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spi_tx(offset >> 0); /* LSB */
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FASTSPI_TX(offset >> 0); /* LSB */
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for(; p < end; p++) {
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for(; p < end; p++) {
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spi_tx(~*p);
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FASTSPI_TX(~*p);
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}
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}
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SPI_WAITFOREOTx();
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SPI_FLASH_DISABLE();
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SPI_FLASH_DISABLE();
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splx(s);
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splx(s);
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