Merge pull request #1531 from bkozak-scanimetrics/cc26xx_cc13xx_lpm_fixes
Fixed numerous bugs in CC26xx-CC13xx lpm
This commit is contained in:
George Oikonomou
commit
3a34b1f695
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@ -75,7 +75,12 @@ LIST(modules_list);
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* Don't consider standby mode if the next AON RTC event is scheduled to fire
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* Don't consider standby mode if the next AON RTC event is scheduled to fire
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* in less than STANDBY_MIN_DURATION rtimer ticks
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* in less than STANDBY_MIN_DURATION rtimer ticks
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*/
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*/
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#define STANDBY_MIN_DURATION (RTIMER_SECOND >> 11)
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#define STANDBY_MIN_DURATION (RTIMER_SECOND >> 11)
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#define MINIMAL_SAFE_SCHEDUAL 8u
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#define MAX_SLEEP_TIME RTIMER_SECOND
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#define DEFAULT_SLEEP_TIME RTIMER_SECOND
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/*---------------------------------------------------------------------------*/
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#define CLK_TO_RT(c) ((c) * (RTIMER_SECOND / CLOCK_SECOND))
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/* Prototype of a function in clock.c. Called every time we come out of DS */
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/* Prototype of a function in clock.c. Called every time we come out of DS */
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void clock_update(void);
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void clock_update(void);
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@ -234,30 +239,195 @@ wake_up(void)
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}
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}
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}
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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void
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static void
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lpm_drop()
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deep_sleep(void)
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{
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{
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lpm_registered_module_t *module;
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uint8_t max_pm = LPM_MODE_MAX_SUPPORTED;
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uint8_t module_pm;
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clock_time_t next_event;
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uint32_t domains = LOCKABLE_DOMAINS;
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uint32_t domains = LOCKABLE_DOMAINS;
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lpm_registered_module_t *module;
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/* Critical. Don't get interrupted! */
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/*
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ti_lib_int_master_disable();
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* Notify all registered modules that we are dropping to mode X. We do not
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* need to do this for simple sleep.
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*
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* This is a chance for modules to delay us a little bit until an ongoing
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* operation has finished (e.g. uart TX) or to configure themselves for
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* deep sleep.
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*
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* At this stage, we also collect power domain locks, if any.
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* The argument to PRCMPowerDomainOff() is a bitwise OR, so every time
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* we encounter a lock we just clear the respective bits in the 'domains'
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* variable as required by the lock. In the end the domains variable will
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* just hold whatever has not been cleared
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*/
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for(module = list_head(modules_list); module != NULL;
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module = module->next) {
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if(module->shutdown) {
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module->shutdown(LPM_MODE_DEEP_SLEEP);
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}
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/* Check if any events fired before we turned interrupts off. If so, abort */
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/* Clear the bits specified in the lock */
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if(process_nevents()) {
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domains &= ~module->domain_lock;
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ti_lib_int_master_enable();
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return;
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}
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}
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if(RTIMER_CLOCK_LT(soc_rtc_get_next_trigger(),
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/* Pat the dog: We don't want it to shout right after we wake up */
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RTIMER_NOW() + STANDBY_MIN_DURATION)) {
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watchdog_periodic();
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ti_lib_int_master_enable();
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lpm_sleep();
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/* Clear unacceptable bits, just in case a lock provided a bad value */
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return;
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domains &= LOCKABLE_DOMAINS;
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/*
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* Freeze the IOs on the boundary between MCU and AON. We only do this if
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* PERIPH is not needed
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*/
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if(domains & PRCM_DOMAIN_PERIPH) {
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ti_lib_aon_ioc_freeze_enable();
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}
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/*
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* Among LOCKABLE_DOMAINS, turn off those that are not locked
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*
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* If domains is != 0, pass it as-is
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*/
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if(domains) {
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ti_lib_prcm_power_domain_off(domains);
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}
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/*
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* Before entering Deep Sleep, we must switch off the HF XOSC. The HF XOSC
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* is predominantly controlled by the RF driver. In a build with radio
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* cycling (e.g. ContikiMAC), the RF driver will request the XOSC before
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* using the Freq. Synth, and switch back to the RC when it is about to
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* turn back off.
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*
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* If the radio is on, we won't even reach here, and if it's off the HF
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* clock source should already be the HF RC.
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*
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* Nevertheless, request the switch to the HF RC explicitly here.
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*/
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oscillators_switch_to_hf_rc();
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/* Configure clock sources for MCU and AUX: No clock */
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ti_lib_aon_wuc_mcu_power_down_config(AONWUC_NO_CLOCK);
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ti_lib_aon_wuc_aux_power_down_config(AONWUC_NO_CLOCK);
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/* Full RAM retention. */
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ti_lib_aon_wuc_mcu_sram_config(MCU_RAM0_RETENTION | MCU_RAM1_RETENTION |
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MCU_RAM2_RETENTION | MCU_RAM3_RETENTION);
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/* Disable retention of AUX RAM */
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ti_lib_aon_wuc_aux_sram_config(false);
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/*
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* Always turn off RFCORE, CPU, SYSBUS and VIMS. RFCORE should be off
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* already
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*/
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ti_lib_prcm_power_domain_off(PRCM_DOMAIN_RFCORE | PRCM_DOMAIN_CPU |
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PRCM_DOMAIN_VIMS | PRCM_DOMAIN_SYSBUS);
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/* Request JTAG domain power off */
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ti_lib_aon_wuc_jtag_power_off();
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/* Turn off AUX */
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ti_lib_aux_wuc_power_ctrl(AUX_WUC_POWER_OFF);
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ti_lib_aon_wuc_domain_power_down_enable();
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while(ti_lib_aon_wuc_power_status_get() & AONWUC_AUX_POWER_ON);
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/* Configure the recharge controller */
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ti_lib_sys_ctrl_set_recharge_before_power_down(XOSC_IN_HIGH_POWER_MODE);
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/*
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* If both PERIPH and SERIAL PDs are off, request the uLDO as the power
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* source while in deep sleep.
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*/
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if(domains == LOCKABLE_DOMAINS) {
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ti_lib_pwr_ctrl_source_set(PWRCTRL_PWRSRC_ULDO);
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}
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/* We are only interested in IRQ energest while idle or in LPM */
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ENERGEST_IRQ_RESTORE(irq_energest);
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ENERGEST_SWITCH(ENERGEST_TYPE_CPU, ENERGEST_TYPE_LPM);
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/* Sync the AON interface to ensure all writes have gone through. */
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ti_lib_sys_ctrl_aon_sync();
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/*
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* Explicitly turn off VIMS cache, CRAM and TRAM. Needed because of
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* retention mismatch between VIMS logic and cache. We wait to do this
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* until right before deep sleep to be able to use the cache for as long
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* as possible.
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*/
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ti_lib_prcm_cache_retention_disable();
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ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
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/* Deep Sleep */
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ti_lib_prcm_deep_sleep();
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/*
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* When we reach here, some interrupt woke us up. The global interrupt
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* flag is off, hence we have a chance to run things here. We will wake up
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* the chip properly, and then we will enable the global interrupt without
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* unpending events so the handlers can fire
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*/
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wake_up();
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}
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/*---------------------------------------------------------------------------*/
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static void
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safe_schedule_rtimer(rtimer_clock_t time, rtimer_clock_t now, int pm)
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{
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rtimer_clock_t min_sleep;
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rtimer_clock_t max_sleep;
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min_sleep = now + MINIMAL_SAFE_SCHEDUAL;
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max_sleep = now + MAX_SLEEP_TIME;
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if(RTIMER_CLOCK_LT(time, min_sleep)) {
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/* ensure that we schedule sleep a minimal number of ticks into the
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future */
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soc_rtc_schedule_one_shot(AON_RTC_CH1, min_sleep);
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} else if((pm == LPM_MODE_SLEEP) && RTIMER_CLOCK_LT(max_sleep, time)) {
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/* if max_pm is LPM_MODE_SLEEP, we could trigger the watchdog if we slept
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for too long. */
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soc_rtc_schedule_one_shot(AON_RTC_CH1, max_sleep);
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} else {
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soc_rtc_schedule_one_shot(AON_RTC_CH1, time);
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}
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}
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/*---------------------------------------------------------------------------*/
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static int
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setup_sleep_mode(void)
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{
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rtimer_clock_t et_distance = 0;
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lpm_registered_module_t *module;
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int max_pm;
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int module_pm;
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int etimer_is_pending;
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rtimer_clock_t now;
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rtimer_clock_t et_time;
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rtimer_clock_t next_trig;
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max_pm = LPM_MODE_MAX_SUPPORTED;
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now = RTIMER_NOW();
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if((LPM_MODE_MAX_SUPPORTED == LPM_MODE_AWAKE) || process_nevents()) {
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return LPM_MODE_AWAKE;
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}
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etimer_is_pending = etimer_pending();
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if(etimer_is_pending) {
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et_distance = CLK_TO_RT(etimer_next_expiration_time() - clock_time());
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if(RTIMER_CLOCK_LT(et_distance, 1)) {
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/* there is an etimer which is already expired; we shouldn't go to
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sleep at all */
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return LPM_MODE_AWAKE;
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}
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}
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next_trig = soc_rtc_get_next_trigger();
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if(RTIMER_CLOCK_LT(next_trig, now + STANDBY_MIN_DURATION)) {
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return LPM_MODE_SLEEP;
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}
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}
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/* Collect max allowed PM permission from interested modules */
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/* Collect max allowed PM permission from interested modules */
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@ -272,146 +442,36 @@ lpm_drop()
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}
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}
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/* Reschedule AON RTC CH1 to fire just in time for the next etimer event */
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/* Reschedule AON RTC CH1 to fire just in time for the next etimer event */
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next_event = etimer_next_expiration_time();
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if(etimer_is_pending) {
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et_time = soc_rtc_last_isr_time() + et_distance;
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if(etimer_pending()) {
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safe_schedule_rtimer(et_time, now, max_pm);
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next_event = next_event - clock_time();
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} else {
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soc_rtc_schedule_one_shot(AON_RTC_CH1, soc_rtc_last_isr_time() +
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/* set a maximal sleep period if no etimers are queued */
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(next_event * (RTIMER_SECOND / CLOCK_SECOND)));
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soc_rtc_schedule_one_shot(AON_RTC_CH1, now + DEFAULT_SLEEP_TIME);
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}
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}
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return max_pm;
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}
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/*---------------------------------------------------------------------------*/
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void
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lpm_drop()
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{
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uint8_t max_pm;
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/* Critical. Don't get interrupted! */
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ti_lib_int_master_disable();
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max_pm = setup_sleep_mode();
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/* Drop */
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/* Drop */
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if(max_pm == LPM_MODE_SLEEP) {
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if(max_pm == LPM_MODE_SLEEP) {
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ti_lib_int_master_enable();
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lpm_sleep();
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lpm_sleep();
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} else {
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} else if(max_pm == LPM_MODE_DEEP_SLEEP) {
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/*
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deep_sleep();
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* Notify all registered modules that we are dropping to mode X. We do not
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* need to do this for simple sleep.
|
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*
|
|
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* This is a chance for modules to delay us a little bit until an ongoing
|
|
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* operation has finished (e.g. uart TX) or to configure themselves for
|
|
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* deep sleep.
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*
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|
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* At this stage, we also collect power domain locks, if any.
|
|
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* The argument to PRCMPowerDomainOff() is a bitwise OR, so every time
|
|
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* we encounter a lock we just clear the respective bits in the 'domains'
|
|
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* variable as required by the lock. In the end the domains variable will
|
|
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* just hold whatever has not been cleared
|
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*/
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for(module = list_head(modules_list); module != NULL;
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module = module->next) {
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if(module->shutdown) {
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module->shutdown(max_pm);
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}
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/* Clear the bits specified in the lock */
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domains &= ~module->domain_lock;
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}
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/* Pat the dog: We don't want it to shout right after we wake up */
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watchdog_periodic();
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/* Clear unacceptable bits, just in case a lock provided a bad value */
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domains &= LOCKABLE_DOMAINS;
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/*
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|
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* Freeze the IOs on the boundary between MCU and AON. We only do this if
|
|
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* PERIPH is not needed
|
|
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*/
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if(domains & PRCM_DOMAIN_PERIPH) {
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ti_lib_aon_ioc_freeze_enable();
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}
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/*
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|
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* Among LOCKABLE_DOMAINS, turn off those that are not locked
|
|
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*
|
|
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* If domains is != 0, pass it as-is
|
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*/
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|
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if(domains) {
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ti_lib_prcm_power_domain_off(domains);
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|
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}
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|
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/*
|
|
||||||
* Before entering Deep Sleep, we must switch off the HF XOSC. The HF XOSC
|
|
||||||
* is predominantly controlled by the RF driver. In a build with radio
|
|
||||||
* cycling (e.g. ContikiMAC), the RF driver will request the XOSC before
|
|
||||||
* using the Freq. Synth, and switch back to the RC when it is about to
|
|
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* turn back off.
|
|
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*
|
|
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* If the radio is on, we won't even reach here, and if it's off the HF
|
|
||||||
* clock source should already be the HF RC.
|
|
||||||
*
|
|
||||||
* Nevertheless, request the switch to the HF RC explicitly here.
|
|
||||||
*/
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|
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oscillators_switch_to_hf_rc();
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|
||||||
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|
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/* Configure clock sources for MCU and AUX: No clock */
|
|
||||||
ti_lib_aon_wuc_mcu_power_down_config(AONWUC_NO_CLOCK);
|
|
||||||
ti_lib_aon_wuc_aux_power_down_config(AONWUC_NO_CLOCK);
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|
||||||
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|
||||||
/* Full RAM retention. */
|
|
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ti_lib_aon_wuc_mcu_sram_config(MCU_RAM0_RETENTION | MCU_RAM1_RETENTION |
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|
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MCU_RAM2_RETENTION | MCU_RAM3_RETENTION);
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|
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|
|
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/* Disable retention of AUX RAM */
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|
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ti_lib_aon_wuc_aux_sram_config(false);
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|
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/*
|
|
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* Always turn off RFCORE, CPU, SYSBUS and VIMS. RFCORE should be off
|
|
||||||
* already
|
|
||||||
*/
|
|
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ti_lib_prcm_power_domain_off(PRCM_DOMAIN_RFCORE | PRCM_DOMAIN_CPU |
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PRCM_DOMAIN_VIMS | PRCM_DOMAIN_SYSBUS);
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|
||||||
/* Request JTAG domain power off */
|
|
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ti_lib_aon_wuc_jtag_power_off();
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/* Turn off AUX */
|
|
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ti_lib_aux_wuc_power_ctrl(AUX_WUC_POWER_OFF);
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|
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ti_lib_aon_wuc_domain_power_down_enable();
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|
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while(ti_lib_aon_wuc_power_status_get() & AONWUC_AUX_POWER_ON);
|
|
||||||
|
|
||||||
/* Configure the recharge controller */
|
|
||||||
ti_lib_sys_ctrl_set_recharge_before_power_down(XOSC_IN_HIGH_POWER_MODE);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* If both PERIPH and SERIAL PDs are off, request the uLDO as the power
|
|
||||||
* source while in deep sleep.
|
|
||||||
*/
|
|
||||||
if(domains == LOCKABLE_DOMAINS) {
|
|
||||||
ti_lib_pwr_ctrl_source_set(PWRCTRL_PWRSRC_ULDO);
|
|
||||||
}
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|
||||||
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|
||||||
/* We are only interested in IRQ energest while idle or in LPM */
|
|
||||||
ENERGEST_IRQ_RESTORE(irq_energest);
|
|
||||||
ENERGEST_SWITCH(ENERGEST_TYPE_CPU, ENERGEST_TYPE_LPM);
|
|
||||||
|
|
||||||
/* Sync the AON interface to ensure all writes have gone through. */
|
|
||||||
ti_lib_sys_ctrl_aon_sync();
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Explicitly turn off VIMS cache, CRAM and TRAM. Needed because of
|
|
||||||
* retention mismatch between VIMS logic and cache. We wait to do this
|
|
||||||
* until right before deep sleep to be able to use the cache for as long
|
|
||||||
* as possible.
|
|
||||||
*/
|
|
||||||
ti_lib_prcm_cache_retention_disable();
|
|
||||||
ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
|
|
||||||
|
|
||||||
/* Deep Sleep */
|
|
||||||
ti_lib_prcm_deep_sleep();
|
|
||||||
|
|
||||||
/*
|
|
||||||
* When we reach here, some interrupt woke us up. The global interrupt
|
|
||||||
* flag is off, hence we have a chance to run things here. We will wake up
|
|
||||||
* the chip properly, and then we will enable the global interrupt without
|
|
||||||
* unpending events so the handlers can fire
|
|
||||||
*/
|
|
||||||
wake_up();
|
|
||||||
|
|
||||||
ti_lib_int_master_enable();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
ti_lib_int_master_enable();
|
||||||
}
|
}
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
void
|
void
|
||||||
|
|
|
||||||
|
|
@ -49,6 +49,7 @@
|
||||||
|
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
|
#define LPM_MODE_AWAKE 0
|
||||||
#define LPM_MODE_SLEEP 1
|
#define LPM_MODE_SLEEP 1
|
||||||
#define LPM_MODE_DEEP_SLEEP 2
|
#define LPM_MODE_DEEP_SLEEP 2
|
||||||
#define LPM_MODE_SHUTDOWN 3
|
#define LPM_MODE_SHUTDOWN 3
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue