Code style fixes: cc253x
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874bec26a5
commit
380ee3bae9
12 changed files with 74 additions and 76 deletions
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@ -67,9 +67,9 @@
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#define RF_TX_LED_OFF() leds_off(LEDS_GREEN);
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#else
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#define RF_RX_LED_ON()
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#define RF_RX_LED_OFF()
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#define RF_RX_LED_OFF()
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#define RF_TX_LED_ON()
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#define RF_TX_LED_OFF()
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#define RF_TX_LED_OFF()
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#endif
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/*---------------------------------------------------------------------------*/
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#define DEBUG 0
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@ -240,8 +240,8 @@ prepare(const void *payload, unsigned short payload_len)
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/* Send the phy length byte first */
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RFD = payload_len + CHECKSUM_LEN; /* Payload plus FCS */
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for(i = 0; i < payload_len; i++) {
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RFD = ((unsigned char*) (payload))[i];
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PUTHEX(((unsigned char*)(payload))[i]);
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RFD = ((unsigned char *)(payload))[i];
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PUTHEX(((unsigned char *)(payload))[i]);
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}
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PUTSTRING("\n");
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@ -264,7 +264,7 @@ transmit(unsigned short transmit_len)
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t0 = RTIMER_NOW();
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on();
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rf_flags |= WAS_OFF;
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while (RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + ONOFF_TIME));
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while(RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + ONOFF_TIME));
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}
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if(channel_clear() == CC2530_RF_CCA_BUSY) {
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@ -305,7 +305,7 @@ transmit(unsigned short transmit_len)
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ENERGEST_OFF(ENERGEST_TYPE_TRANSMIT);
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ENERGEST_ON(ENERGEST_TYPE_LISTEN);
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if(rf_flags & WAS_OFF){
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if(rf_flags & WAS_OFF) {
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off();
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}
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@ -379,11 +379,11 @@ read(void *buf, unsigned short bufsize)
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PUTSTRING(" bytes) = ");
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len -= CHECKSUM_LEN;
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for(i = 0; i < len; ++i) {
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((unsigned char*)(buf))[i] = RFD;
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((unsigned char *)(buf))[i] = RFD;
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#if CC2530_RF_CONF_HEXDUMP
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io_arch_writeb(((unsigned char*)(buf))[i]);
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io_arch_writeb(((unsigned char *)(buf))[i]);
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#endif
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PUTHEX(((unsigned char*)(buf))[i]);
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PUTHEX(((unsigned char *)(buf))[i]);
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}
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PUTSTRING("\n");
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@ -483,17 +483,16 @@ off(void)
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return 1;
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}
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/*---------------------------------------------------------------------------*/
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const struct radio_driver cc2530_rf_driver =
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{
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init,
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prepare,
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transmit,
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send,
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read,
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channel_clear,
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receiving_packet,
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pending_packet,
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on,
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off,
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const struct radio_driver cc2530_rf_driver = {
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init,
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prepare,
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transmit,
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send,
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read,
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channel_clear,
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receiving_packet,
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pending_packet,
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on,
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off,
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};
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/*---------------------------------------------------------------------------*/
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@ -121,13 +121,13 @@ clock_init(void)
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/* Initialize tick value */
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timer_value = ST0;
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timer_value += ((unsigned long int) ST1) << 8;
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timer_value += ((unsigned long int) ST2) << 16;
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timer_value += ((unsigned long int)ST1) << 8;
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timer_value += ((unsigned long int)ST2) << 16;
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timer_value += TICK_VAL;
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ST2 = (unsigned char) (timer_value >> 16);
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ST1 = (unsigned char) (timer_value >> 8);
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ST0 = (unsigned char) timer_value;
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ST2 = (unsigned char)(timer_value >> 16);
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ST1 = (unsigned char)(timer_value >> 8);
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ST0 = (unsigned char)timer_value;
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STIE = 1; /* IEN0.STIE interrupt enable */
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}
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/*---------------------------------------------------------------------------*/
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@ -147,15 +147,15 @@ clock_isr(void) __interrupt(ST_VECTOR)
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* Next interrupt occurs after the current time + TICK_VAL
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*/
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timer_value = ST0;
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timer_value += ((unsigned long int) ST1) << 8;
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timer_value += ((unsigned long int) ST2) << 16;
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timer_value += ((unsigned long int)ST1) << 8;
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timer_value += ((unsigned long int)ST2) << 16;
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timer_value += TICK_VAL;
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ST2 = (unsigned char) (timer_value >> 16);
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ST1 = (unsigned char) (timer_value >> 8);
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ST0 = (unsigned char) timer_value;
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ST2 = (unsigned char)(timer_value >> 16);
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ST1 = (unsigned char)(timer_value >> 8);
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ST0 = (unsigned char)timer_value;
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++count;
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/* Make sure the CLOCK_CONF_SECOND is a power of two, to ensure
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that the modulo operation below becomes a logical and and not
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an expensive divide. Algorithm from Wikipedia:
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@ -167,7 +167,7 @@ clock_isr(void) __interrupt(ST_VECTOR)
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if(count % CLOCK_CONF_SECOND == 0) {
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++seconds;
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}
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#if CLOCK_CONF_STACK_FRIENDLY
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sleep_flag = 1;
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#else
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@ -176,7 +176,7 @@ clock_isr(void) __interrupt(ST_VECTOR)
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etimer_request_poll();
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}
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#endif
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STIF = 0; /* IRCON.STIF */
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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ENABLE_INTERRUPTS();
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@ -17,7 +17,7 @@
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#if DMA_ON
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struct dma_config dma_conf[DMA_CHANNEL_COUNT]; /* DMA Descriptors */
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struct process * dma_callback[DMA_CHANNEL_COUNT];
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struct process *dma_callback[DMA_CHANNEL_COUNT];
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/*---------------------------------------------------------------------------*/
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void
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dma_init(void)
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@ -31,7 +31,7 @@ dma_init(void)
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}
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/* The address of the descriptor for Channel 0 is configured separately */
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tmp_ptr = (uint16_t) &(dma_conf[0]);
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tmp_ptr = (uint16_t)&(dma_conf[0]);
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DMA0CFGH = tmp_ptr >> 8;
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DMA0CFGL = tmp_ptr;
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@ -41,7 +41,7 @@ dma_init(void)
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* derived by the SoC
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*/
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#if (DMA_CHANNEL_COUNT > 1)
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tmp_ptr = (uint16_t) &(dma_conf[1]);
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tmp_ptr = (uint16_t)&(dma_conf[1]);
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DMA1CFGH = tmp_ptr >> 8;
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DMA1CFGL = tmp_ptr;
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#endif
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@ -54,7 +54,7 @@ dma_init(void)
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* completes, the ISR will poll this process.
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*/
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void
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dma_associate_process(struct process * p, uint8_t c)
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dma_associate_process(struct process *p, uint8_t c)
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{
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if((!c) || (c >= DMA_CHANNEL_COUNT)) {
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return;
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@ -80,15 +80,15 @@ dma_reset(uint8_t c)
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return;
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}
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DMA_ABORT(c);
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dma_conf[c].src_h = (uint16_t) &dummy >> 8;
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dma_conf[c].src_l = (uint16_t) &dummy;
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dma_conf[c].dst_h = (uint16_t) &dummy >> 8;
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dma_conf[c].dst_l = (uint16_t) &dummy;
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dma_conf[c].src_h = (uint16_t)&dummy >> 8;
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dma_conf[c].src_l = (uint16_t)&dummy;
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dma_conf[c].dst_h = (uint16_t)&dummy >> 8;
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dma_conf[c].dst_l = (uint16_t)&dummy;
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dma_conf[c].len_h = 0;
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dma_conf[c].len_l = 1;
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dma_conf[c].wtt = DMA_BLOCK;
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dma_conf[c].inc_prio = DMA_PRIO_GUARANTEED;
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DMA_TRIGGER(c); // The operation order is important
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DMA_TRIGGER(c); /** The operation order is important */
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DMA_ARM(c);
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while(DMAARM & (1 << c));
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}
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@ -139,12 +139,12 @@ extern dma_config_t dma_conf[DMA_CHANNEL_COUNT];
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/* Functions Declarations */
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void dma_init(void);
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void dma_associate_process (struct process * p, uint8_t c);
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void dma_associate_process(struct process *p, uint8_t c);
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void dma_reset(uint8_t c);
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/* Only link the ISR when DMA_ON is .... on */
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#if DMA_ON
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void dma_isr( void ) __interrupt (DMA_VECTOR);
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void dma_isr(void) __interrupt(DMA_VECTOR);
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#endif
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#endif /*__DMA_H*/
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@ -16,7 +16,7 @@
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#include "cc253x.h"
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#if DMA_ON
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extern struct process * dma_callback[DMA_CHANNEL_COUNT];
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extern struct process *dma_callback[DMA_CHANNEL_COUNT];
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#endif
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/*---------------------------------------------------------------------------*/
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@ -38,17 +38,17 @@ extern void spi_rx_dma_callback(void);
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#pragma exclude bits
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#endif
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void
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dma_isr(void) __interrupt (DMA_VECTOR)
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dma_isr(void) __interrupt(DMA_VECTOR)
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{
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#if DMA_ON
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uint8_t i;
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#endif
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EA=0;
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EA = 0;
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DMAIF = 0;
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#ifdef HAVE_RF_DMA
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if((DMAIRQ & 1) != 0) {
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DMAIRQ = ~1;
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DMAARM=0x81;
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DMAARM = 0x81;
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rf_dma_callback_isr();
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}
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#endif
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@ -38,7 +38,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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struct cc253x_p2_handler {
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struct cc253x_p2_handler *next;
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uint8_t (*cb) (void);
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uint8_t (* cb)(void);
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};
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void cc253x_p2_register_handler(struct cc253x_p2_handler *h);
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@ -18,16 +18,16 @@
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#include "dev/leds.h"
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#if UART0_ENABLE
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static int (*uart0_input_handler)(unsigned char c);
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static int (* uart0_input_handler)(unsigned char c);
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#endif
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#if UART1_ENABLE
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static int (*uart1_input_handler)(unsigned char c);
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static int (* uart1_input_handler)(unsigned char c);
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#endif
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#if UART0_ENABLE
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/*---------------------------------------------------------------------------*/
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void
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uart0_set_input(int (*input)(unsigned char c))
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uart0_set_input(int (* input)(unsigned char c))
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{
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uart0_input_handler = input;
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}
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#pragma exclude bits
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#endif
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void
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uart0_rx_isr(void) __interrupt (URX0_VECTOR)
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uart0_rx_isr(void) __interrupt(URX0_VECTOR)
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{
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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leds_toggle(LEDS_YELLOW);
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#if UART1_ENABLE
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/*---------------------------------------------------------------------------*/
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void
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uart1_set_input(int (*input)(unsigned char c))
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uart1_set_input(int (* input)(unsigned char c))
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{
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uart1_input_handler = input;
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}
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#pragma exclude bits
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#endif
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void
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uart1_rx_isr(void) __interrupt (URX1_VECTOR)
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uart1_rx_isr(void) __interrupt(URX1_VECTOR)
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{
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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URX1IF = 0;
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@ -20,10 +20,10 @@
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void uart0_init();
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void uart0_writeb(uint8_t byte);
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void uart0_set_input(int (*input)(unsigned char c));
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void uart0_set_input(int (* input)(unsigned char c));
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#if UART0_CONF_WITH_INPUT
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void uart0_rx_isr( void ) __interrupt (URX0_VECTOR);
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void uart0_rx_isr(void) __interrupt(URX0_VECTOR);
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/* Macro to turn on / off UART RX Interrupt */
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#define UART0_RX_INT(v) do { URX0IE = v; } while(0)
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#define UART0_RX_EN() do { U0CSR |= UCSR_RE; } while(0)
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void uart1_init();
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void uart1_writeb(uint8_t byte);
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void uart1_set_input(int (*input)(unsigned char c));
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void uart1_set_input(int (* input)(unsigned char c));
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#if UART1_CONF_WITH_INPUT
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void uart1_rx_isr( void ) __interrupt (URX1_VECTOR);
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void uart1_rx_isr(void) __interrupt(URX1_VECTOR);
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/* Macro to turn on / off UART RX Interrupt */
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#define UART1_RX_INT(v) do { URX1IE = v; } while(0)
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#else
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@ -29,16 +29,16 @@
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*
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*/
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/*
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* \file
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* Stub header file for multi-threading. It doesn't do anything, it
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* just exists so that mt.c can compile cleanly.
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*
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* This is based on the original mtarch.h for z80 by Takahide Matsutsuka
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*
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* \author
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* George Oikonomou - <oikonomou@users.sourceforge.net>
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*/
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/*
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* \file
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* Stub header file for multi-threading. It doesn't do anything, it
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* just exists so that mt.c can compile cleanly.
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*
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* This is based on the original mtarch.h for z80 by Takahide Matsutsuka
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*
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* \author
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* George Oikonomou - <oikonomou@users.sourceforge.net>
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*/
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#ifndef __MTARCH_H__
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#define __MTARCH_H__
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};
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#endif /* __MTARCH_H__ */
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@ -87,8 +87,8 @@ rtimer_arch_schedule(rtimer_clock_t t)
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/* Switch to capture mode before writing T1CC1x and
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* set the compare mode values so we can get an interrupt after t */
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RT_MODE_CAPTURE();
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T1CC1L = (unsigned char) t;
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T1CC1H = (unsigned char) (t >> 8);
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T1CC1L = (unsigned char)t;
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T1CC1H = (unsigned char)(t >> 8);
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RT_MODE_COMPARE();
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/* Turn on compare mode interrupt */
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@ -60,7 +60,7 @@ poison_loop:
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uint8_t
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stack_get_max(void)
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{
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__data uint8_t * sp = (__data uint8_t *) 0xff;
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__data uint8_t *sp = (__data uint8_t *)0xff;
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uint8_t free = 0;
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while(*sp-- == STACK_POISON) {
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