From 3726588f02e8d418b44eb91e130ae9abf654617d Mon Sep 17 00:00:00 2001
From: maralvira <maralvira>
Date: Sun, 7 Nov 2010 14:17:45 +0000
Subject: [PATCH] Add structure-based GPIO register definitions

---
 cpu/mc1322x/lib/include/gpio.h | 62 +++++++++++++++++++++++++++++++++-
 1 file changed, 61 insertions(+), 1 deletion(-)

diff --git a/cpu/mc1322x/lib/include/gpio.h b/cpu/mc1322x/lib/include/gpio.h
index e4e2ff35e..e730e04c8 100644
--- a/cpu/mc1322x/lib/include/gpio.h
+++ b/cpu/mc1322x/lib/include/gpio.h
@@ -30,12 +30,70 @@
  * This file is part of libmc1322x: see http://mc1322x.devl.org
  * for details. 
  *
- * $Id: gpio.h,v 1.1 2010/06/10 14:55:39 maralvira Exp $
+ * $Id: gpio.h,v 1.2 2010/11/07 14:17:45 maralvira Exp $
  */
 
 #ifndef GPIO_H
 #define GPIO_H
 
+/* Structure-based GPIO access
+   Example usage:
+
+   GPIO.FUNC_SEL0 |= 0x00008000; // set a whole register
+
+   GPIO.FUNC_SEL_08 = 2;	 // set just one pin
+
+   #define MY_PIN GPIO_08
+   GPIO.FUNC_SEL.MY_PIN = 2;	 // same, to allow #define for pin names
+   GPIO.DATA.MY_PIN = 1;
+*/
+
+#define _V(x,n,i) uint32_t x##_##i : n;
+#define _REP(x,n) \
+	_V(x,n,00) _V(x,n,01) _V(x,n,02) _V(x,n,03) _V(x,n,04) _V(x,n,05) _V(x,n,06) _V(x,n,07) \
+	_V(x,n,08) _V(x,n,09) _V(x,n,10) _V(x,n,11) _V(x,n,12) _V(x,n,13) _V(x,n,14) _V(x,n,15) \
+	_V(x,n,16) _V(x,n,17) _V(x,n,18) _V(x,n,19) _V(x,n,20) _V(x,n,21) _V(x,n,22) _V(x,n,23) \
+	_V(x,n,24) _V(x,n,25) _V(x,n,26) _V(x,n,27) _V(x,n,28) _V(x,n,29) _V(x,n,30) _V(x,n,31) \
+	_V(x,n,32) _V(x,n,33) _V(x,n,34) _V(x,n,35) _V(x,n,36) _V(x,n,37) _V(x,n,38) _V(x,n,39) \
+	_V(x,n,40) _V(x,n,41) _V(x,n,42) _V(x,n,43) _V(x,n,44) _V(x,n,45) _V(x,n,46) _V(x,n,47) \
+	_V(x,n,48) _V(x,n,49) _V(x,n,50) _V(x,n,51) _V(x,n,52) _V(x,n,53) _V(x,n,54) _V(x,n,55) \
+	_V(x,n,56) _V(x,n,57) _V(x,n,58) _V(x,n,59) _V(x,n,60) _V(x,n,61) _V(x,n,62) _V(x,n,63)
+
+struct GPIO_struct {
+#define _IO(x) \
+	union { struct { uint32_t x##0; uint32_t x##1; }; \
+		struct { _REP(x, 1) };  \
+		struct { _REP(GPIO, 1) } x; };
+#define _IO_2bit(x)	\
+	union { struct { uint32_t x##0; uint32_t x##1; uint32_t x##2; uint32_t x##3; }; \
+		struct { _REP(x, 2) };  \
+		struct { _REP(GPIO, 2) } x; };
+
+	_IO(PAD_DIR);
+	_IO(DATA);
+	_IO(PAD_PU_EN);
+	_IO_2bit(FUNC_SEL);
+	_IO(DATA_SEL);
+	_IO(PAD_PU_SEL);
+	_IO(PAD_HYST_EN);
+	_IO(PAD_KEEP);
+	_IO(DATA_SET);
+	_IO(DATA_RESET);
+	_IO(PAD_DIR_SET);
+	_IO(PAD_DIR_RESET);
+};
+#undef _IO
+#undef _IO_2bit
+#undef _REP
+#undef _V
+
+static volatile struct GPIO_struct * const _GPIO = (void *) (0x80000000);
+#define GPIO (*_GPIO)
+
+
+/* Old register definitions, for compatibility */
+#ifndef REG_NO_COMPAT
+
 #define GPIO_PAD_DIR0      ((volatile uint32_t *) 0x80000000)
 #define GPIO_PAD_DIR1      ((volatile uint32_t *) 0x80000004)
 #define GPIO_DATA0         ((volatile uint32_t *) 0x80000008)
@@ -87,4 +145,6 @@ inline void gpio_pad_dir_reset(volatile uint64_t data);
 #define gpio_pu1_enable(b) (set_bit(*GPIO_PAD_PU_EN1,b-32))
 #define gpio_pu1_disable(b) (clear_bit(*GPIO_PAD_PU_EN1,b-32))
 
+#endif /* REG_NO_COMPAT */
+
 #endif