diff --git a/cpu/cc2538/ieee-addr.c b/cpu/cc2538/ieee-addr.c index cb8c901bc..f45e4210d 100644 --- a/cpu/cc2538/ieee-addr.c +++ b/cpu/cc2538/ieee-addr.c @@ -49,10 +49,36 @@ ieee_addr_cpy_to(uint8_t *dst, uint8_t len) memcpy(dst, &ieee_addr_hc[8 - len], len); } else { - /* Reading from Info Page, we need to invert byte order */ + /* + * By default, we assume that the IEEE address is stored on flash using + * little-endian byte order. + * + * However, some SoCs ship with a different byte order, whereby the first + * four bytes are flipped with the four last ones. + * + * Using this address as an example: 00 12 4B 00 01 02 03 04 + * We expect it stored as: 04 03 02 01 00 4B 12 00 + * But it is also possible to encounter: 00 4B 12 00 04 03 02 01 + * + * Thus: read locations [3, 2, 1] and if we encounter the TI OUI, flip the + * order of the two 4-byte sequences. Each of the 4-byte sequences is still + * little-endian. + */ int i; - for(i = 0; i < len; i++) { - dst[i] = ((uint8_t *)IEEE_ADDR_LOCATION)[len - 1 - i]; + uint8_t oui_ti[3] = IEEE_ADDR_OUI_TI; + if(((uint8_t *)IEEE_ADDR_LOCATION)[3] == oui_ti[0] + && ((uint8_t *)IEEE_ADDR_LOCATION)[2] == oui_ti[1] + && ((uint8_t *)IEEE_ADDR_LOCATION)[1] == oui_ti[2]) { + for(i = 0; i < len / 2; i++) { + dst[i] = ((uint8_t *)IEEE_ADDR_LOCATION)[len / 2 - 1 - i]; + } + for(i = 0; i < len / 2; i++) { + dst[i + len / 2] = ((uint8_t *)IEEE_ADDR_LOCATION)[len - 1 - i]; + } + } else { + for(i = 0; i < len; i++) { + dst[i] = ((uint8_t *)IEEE_ADDR_LOCATION)[len - 1 - i]; + } } } diff --git a/cpu/cc2538/ieee-addr.h b/cpu/cc2538/ieee-addr.h index c7618c1e7..faeacdb8f 100644 --- a/cpu/cc2538/ieee-addr.h +++ b/cpu/cc2538/ieee-addr.h @@ -49,11 +49,27 @@ #include /*---------------------------------------------------------------------------*/ /** - * \name IEEE address locations + * \name TI OUI * @{ */ -#define IEEE_ADDR_LOCATION_PRIMARY 0x00280028 /**< IEEE address location */ -#define IEEE_ADDR_LOCATION_SECONDARY 0x0027FFCC /**< IEEE address location */ +#define IEEE_ADDR_OUI_TI { 0x00, 0x12, 0x4B } /**< TI OUI */ +/** @} */ +/*---------------------------------------------------------------------------*/ +/** + * \name IEEE address locations + * + * The address of the secondary location can be configured by the platform + * or example + * + * @{ + */ +#define IEEE_ADDR_LOCATION_PRIMARY 0x00280028 /**< Primary IEEE address location */ + +#ifdef IEEE_ADDR_CONF_LOCATION_SECONDARY +#define IEEE_ADDR_LOCATION_SECONDARY IEEE_ADDR_CONF_LOCATION_SECONDARY +#else +#define IEEE_ADDR_LOCATION_SECONDARY 0x0027FFCC /**< Secondary IEEE address location */ +#endif /** @} */ /*---------------------------------------------------------------------------*/ /**