Merge pull request #691 from hexluthor/rts-cts
CC2538: Add hardware flow control (RTS/CTS) support on UART1.
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2e166a83c7
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@ -287,10 +287,6 @@ uart_init(uint8_t uart)
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GPIO_PERIPHERAL_CONTROL(GPIO_PORT_TO_BASE(regs->rx.port),
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GPIO_PIN_MASK(regs->rx.pin));
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if(regs->cts.port >= 0 || regs->rts.port >= 0) {
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/* TODO Hardware flow control */
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}
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/*
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* UART Interrupt Masks:
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* Acknowledge RX and RX Timeout
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@ -312,6 +308,24 @@ uart_init(uint8_t uart)
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/* UART Control: 8N1 with FIFOs */
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REG(regs->base | UART_LCRH) = UART_LCRH_WLEN_8 | UART_LCRH_FEN;
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/*
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* Enable hardware flow control (RTS/CTS) if requested.
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* Note that hardware flow control is available only on UART1.
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*/
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if(regs->cts.port >= 0) {
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REG(IOC_UARTCTS_UART1) = ioc_input_sel(regs->cts.port, regs->cts.pin);
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GPIO_PERIPHERAL_CONTROL(GPIO_PORT_TO_BASE(regs->cts.port), GPIO_PIN_MASK(regs->cts.pin));
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ioc_set_over(regs->cts.port, regs->cts.pin, IOC_OVERRIDE_DIS);
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REG(UART_1_BASE | UART_CTL) |= UART_CTL_CTSEN;
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}
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if(regs->rts.port >= 0) {
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ioc_set_sel(regs->rts.port, regs->rts.pin, IOC_PXX_SEL_UART1_RTS);
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GPIO_PERIPHERAL_CONTROL(GPIO_PORT_TO_BASE(regs->rts.port), GPIO_PIN_MASK(regs->rts.pin));
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ioc_set_over(regs->rts.port, regs->rts.pin, IOC_OVERRIDE_OE);
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REG(UART_1_BASE | UART_CTL) |= UART_CTL_RTSEN;
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}
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/* UART Enable */
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REG(regs->base | UART_CTL) |= UART_CTL_UARTEN;
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@ -165,6 +165,8 @@
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/** \name UART_CTL Register Bit-Masks
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* @{
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*/
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#define UART_CTL_CTSEN 0x00008000 /**< UART CTS flow-control enable (UART1 only) */
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#define UART_CTL_RTSEN 0x00004000 /**< UART RTS flow-control enable (UART1 only) */
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#define UART_CTL_RXE 0x00000200 /**< UART receive enable */
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#define UART_CTL_TXE 0x00000100 /**< UART transmit enable */
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#define UART_CTL_LBE 0x00000080 /**< UART loop back enable */
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