Added compatibility with W5100 shared access.
If the setup of socket 0 to 3 with 4+2+1+1KB is detected then the W5100 is _not_ initialized, otherwise it does set up socket 0 and 1 with 4KB each. Either way socket 0 is used - now with 4KB instead of 8KB as before.
This commit is contained in:
Oliver Schmidt
parent
520519860e
commit
2c48f3b232
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@ -97,7 +97,8 @@ fixup: .byte fixup02-fixup01, fixup03-fixup02, fixup04-fixup03
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.byte fixup20-fixup19, fixup21-fixup20, fixup22-fixup21
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.byte fixup23-fixup22, fixup24-fixup23, fixup25-fixup24
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.byte fixup26-fixup25, fixup27-fixup26, fixup28-fixup27
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.byte fixup29-fixup28, fixup30-fixup29
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.byte fixup29-fixup28, fixup30-fixup29, fixup31-fixup30
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.byte fixup32-fixup31
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fixups = * - fixup
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@ -164,44 +165,64 @@ fixup04:eor data
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sec
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rts
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; Check for W5100 shared access
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; RX Memory Size Register: Assign 4+2+1+1KB to socket 0 to 3 ?
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: ; ldx #$00 ; Hibyte
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ldy #$1A ; Lobyte
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jsr set_addr
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fixup05:lda data
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cmp #$06
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beq :+++
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; S/W Reset
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: lda #$80
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fixup05:sta mode
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lda #$80
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fixup06:sta mode
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:
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fixup06:lda mode
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fixup07:lda mode
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bmi :-
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; Indirect Bus I/F mode, Address Auto-Increment, Ping Block
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lda #$13
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fixup07:sta mode
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fixup08:sta mode
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; Source Hardware Address Register: MAC Address
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ldx #$00 ; Hibyte
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ldy #$09 ; Lobyte
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jsr set_addr
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: lda mac,x
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fixup08:sta data
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fixup09:sta data
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inx
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cpx #$06
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bcc :-
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; RX Memory Size Register: Assign 8KB to socket 0
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; TX Memory Size Register: Assign 8KB to socket 0
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; RX Memory Size Register: Assign 4KB each to socket 0 and 1
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; TX Memory Size Register: Assign 4KB each to socket 0 and 1
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ldx #$00 ; Hibyte
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ldy #$1A ; Lobyte
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jsr set_addr
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lda #$03
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fixup09:sta data
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lda #$0A
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fixup10:sta data
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fixup11:sta data
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; MAC Address: Source Hardware Address Register
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: ; ldx #$00 ; Hibyte
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ldy #$09 ; Lobyte
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jsr set_addr
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:
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fixup12:lda data
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sta mac,x
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inx
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cpx #$06
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bcc :-
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; Socket 0 Mode Register: MACRAW, MAC Filter
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; Socket 0 Command Register: OPEN
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ldy #$00
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jsr set_addrsocket0
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lda #$44
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fixup11:sta data
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fixup13:sta data
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lda #$01
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fixup12:sta data
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fixup14:sta data
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tya
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tax
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clc
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@ -213,7 +234,7 @@ poll:
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; Check for completion of previous command
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; Socket 0 Command Register: = 0 ?
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jsr set_addrcmdreg0
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fixup13:lda data
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fixup15:lda data
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beq :++
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; No data available
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@ -225,8 +246,8 @@ fixup13:lda data
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; Socket 0 RX Received Size Register: != 0 ?
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: ldy #$26 ; Socket RX Received Size Register
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jsr set_addrsocket0
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fixup14:lda data ; Hibyte
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fixup15:ora data ; Lobyte
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fixup16:lda data ; Hibyte
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fixup17:ora data ; Lobyte
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beq :--
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; Process the incoming data
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@ -243,8 +264,8 @@ fixup15:ora data ; Lobyte
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; Calculate and set physical address
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jsr set_addrphysical
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; Move physical address shadow to $E000-$FFFF
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ora #>$8000
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; Move physical address shadow to $F000-$FFFF
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ora #>$F000
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tax
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; Read MAC raw 2byte packet size header
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@ -292,13 +313,13 @@ common: jsr set_addrsocket0
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tax
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lda reg+1
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adc adv+1
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fixup16:sta data ; Hibyte
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fixup17:stx data ; Lobyte
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fixup18:sta data ; Hibyte
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fixup19:stx data ; Lobyte
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; Set command register
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tya ; Restore command
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jsr set_addrcmdreg0
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fixup18:sta data
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fixup20:sta data
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; Return data length (will be ignored for send)
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lda len
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@ -325,14 +346,14 @@ send:
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; Wait for completion of previous command
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; Socket 0 Command Register: = 0 ?
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: jsr set_addrcmdreg0
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fixup19:lda data
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fixup21:lda data
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bne :-
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; Socket 0 TX Free Size Register: < length ?
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: ldy #$20 ; Socket TX Free Size Register
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jsr set_addrsocket0
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fixup20:lda data ; Hibyte
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fixup21:ldx data ; Lobyte
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fixup22:lda data ; Hibyte
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fixup23:ldx data ; Lobyte
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cpx len
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sbc len+1
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bcc :-
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@ -362,16 +383,16 @@ exit:
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;---------------------------------------------------------------------
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set_addrphysical:
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fixup22:lda data ; Hibyte
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fixup23:ldy data ; Lobyte
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fixup24:lda data ; Hibyte
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fixup25:ldy data ; Lobyte
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sty reg
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sta reg+1
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and #>$1FFF ; Socket Mask Address (hibyte)
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and #>$0FFF ; Socket Mask Address (hibyte)
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ora bas ; Socket Base Address (hibyte)
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tax
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set_addr:
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fixup24:stx addr ; Hibyte
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fixup25:sty addr+1 ; Lobyte
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fixup26:stx addr ; Hibyte
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fixup27:sty addr+1 ; Lobyte
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rts
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set_addrcmdreg0:
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@ -386,7 +407,7 @@ set_addrbase:
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beq set_addr ; Always
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get_datacheckaddr:
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fixup26:lda data
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fixup28:lda data
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iny ; Physical address shadow (lobyte)
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bne :+
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inx ; Physical address shadow (hibyte)
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@ -399,7 +420,7 @@ set_parameters:
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; Setup variables in zero page
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sta bas ; Socket Base Address
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clc
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adc #>$2000 ; Socket memory size
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adc #>$1000 ; Socket memory size
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sta lim ; Socket memory limit
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stx dir ; Transfer direction
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@ -427,10 +448,10 @@ mov_data:
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; R/W without address wraparound possible because
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; highest R/W address > actual R/W address ?
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; sec
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fixup27:sbc addr+1 ; Lobyte
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fixup29:sbc addr+1 ; Lobyte
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tay
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txa
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fixup28:sbc addr ; Hibyte
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fixup30:sbc addr ; Hibyte
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tax
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tya
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bcs :+
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@ -491,7 +512,7 @@ rw_data:eor #$FF ; Two's complement part 1
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; Read data
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:
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fixup29:lda data
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fixup31:lda data
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sta (ptr),y
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iny
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bne :-
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@ -502,7 +523,7 @@ fixup29:lda data
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; Write data
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: lda (ptr),y
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fixup30:sta data
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fixup32:sta data
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iny
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bne :-
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inc ptr+1
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