From 290f41db066f5c3b6ed5635606de0bd7b50b1366 Mon Sep 17 00:00:00 2001 From: nvt-se Date: Fri, 14 Sep 2007 19:20:24 +0000 Subject: [PATCH] better comments. enable interrupt later. --- platform/msb430/dev/dma.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/platform/msb430/dev/dma.c b/platform/msb430/dev/dma.c index edf3b87bb..1a47889df 100644 --- a/platform/msb430/dev/dma.c +++ b/platform/msb430/dev/dma.c @@ -105,16 +105,16 @@ dma_transfer(unsigned char *buf, unsigned len) * The source address is incremented for each byte, while the * destination address remains constant. * - * Important to use DMALEVEL when using USART TX - * interrupts so first edge - * doesn't get lost (hangs every 50. - 100. time)! + * In order to avoid missing the first rising edge of the trigger + * signal, it is important to use the level-sensitive trigger when + * using USART transfer interrupts. */ - DMA0CTL = DMADT_0 | DMADSTINCR_0 | DMASRCINCR_3 | DMASBDB | DMALEVEL | DMAIE; + DMA0CTL = DMADT_0 | DMADSTINCR_0 | DMASRCINCR_3 | DMASBDB | DMALEVEL; DMA0SA = (unsigned) buf; DMA0DA = (unsigned) &TXBUF0; DMA0SZ = len; - DMA0CTL |= DMAEN; // enable DMA - U0CTL &= ~SWRST; // enable UART state machine, starts transfer + DMA0CTL |= DMAEN | DMAIE; // enable DMA and interrupts + U0CTL &= ~SWRST; // enable UART state machine, starts transfer }