Turn off Timer A before modifying its control registers to avoid problems when timer is updated frequently

This commit is contained in:
adamdunkels 2010-01-18 21:17:11 +00:00
parent 5fc17c4f04
commit 2772d31ae6
2 changed files with 8 additions and 5 deletions

View file

@ -28,7 +28,7 @@
*
* This file is part of the Contiki operating system.
*
* @(#)$Id: clock.c,v 1.19 2009/12/09 12:55:35 adamdunkels Exp $
* @(#)$Id: clock.c,v 1.20 2010/01/18 21:17:11 adamdunkels Exp $
*/
@ -57,15 +57,15 @@ interrupt(TIMERA1_VECTOR) timera1 (void) {
if(TAIV == 2) {
eint();
/* HW timer bug fix: Interrupt handler called before TR==CCR.
* Occurrs when timer state is toggled between STOP and CONT. */
while(TACTL & MC1 && TACCR1 - TAR == 1);
/* Make sure interrupt time is future */
do {
TACTL &= ~MC1;
TACCR1 += INTERVAL;
TACTL |= MC1;
++count;
/* Make sure the CLOCK_CONF_SECOND is a power of two, to ensure
@ -88,6 +88,7 @@ interrupt(TIMERA1_VECTOR) timera1 (void) {
etimer_request_poll();
LPM4_EXIT;
}
}
/* if(process_nevents() >= 0) {
LPM4_EXIT;

View file

@ -28,7 +28,7 @@
*
* This file is part of the Contiki operating system.
*
* $Id: rtimer-arch.c,v 1.11 2009/12/08 23:39:45 adamdunkels Exp $
* $Id: rtimer-arch.c,v 1.12 2010/01/18 21:17:11 adamdunkels Exp $
*/
/**
@ -81,6 +81,8 @@ void
rtimer_arch_schedule(rtimer_clock_t t)
{
PRINTF("rtimer_arch_schedule time %u\n", t);
TACTL &= ~MC1;
TACCR0 = t;
TACTL |= MC1;
}