Merge pull request #1550 from thomas-ha/tsch-cc2538-port
Port of TSCH for CC2538
This commit is contained in:
Simon Duquennoy
commit
26bf33c762
7 changed files with 191 additions and 29 deletions
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@ -119,6 +119,25 @@ static const uint8_t magic[] = { 0x53, 0x6E, 0x69, 0x66 }; /** Snif */
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#else
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#define CC2538_RF_AUTOACK 1
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#endif
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/*---------------------------------------------------------------------------
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* MAC timer
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*---------------------------------------------------------------------------*/
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/* Timer conversion */
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#define RADIO_TO_RTIMER(X) ((uint32_t)((uint64_t)(X) * RTIMER_ARCH_SECOND / SYS_CTRL_32MHZ))
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#define CLOCK_STABLE() do { \
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while ( !(REG(SYS_CTRL_CLOCK_STA) & (SYS_CTRL_CLOCK_STA_XOSC_STB))); \
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} while(0)
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/*---------------------------------------------------------------------------*/
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/* Are we currently in poll mode? Disabled by default */
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static uint8_t volatile poll_mode = 0;
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/* Do we perform a CCA before sending? Enabled by default. */
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static uint8_t send_on_cca = 1;
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static int8_t rssi;
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static uint8_t crc_corr;
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void mac_timer_init(void);
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uint32_t get_sfd_timestamp(void);
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/*---------------------------------------------------------------------------*/
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static uint8_t rf_flags;
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static uint8_t rf_channel = CC2538_RF_CHANNEL;
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@ -329,6 +348,28 @@ set_frame_filtering(uint8_t enable)
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}
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/*---------------------------------------------------------------------------*/
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static void
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set_poll_mode(uint8_t enable)
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{
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poll_mode = enable;
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if(enable) {
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mac_timer_init();
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REG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_FIFOP; // mask out FIFOP interrupt source
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REG(RFCORE_SFR_RFIRQF0) &= ~RFCORE_SFR_RFIRQF0_FIFOP; // clear pending FIFOP interrupt
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nvic_interrupt_disable(NVIC_INT_RF_RXTX); // disable RF interrupts
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} else {
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REG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_FIFOP; // enable FIFOP interrupt source
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nvic_interrupt_enable(NVIC_INT_RF_RXTX); // enable RF interrupts
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}
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}
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/*---------------------------------------------------------------------------*/
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static void
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set_send_on_cca(uint8_t enable)
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{
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send_on_cca = enable;
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}
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/*---------------------------------------------------------------------------*/
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static void
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set_auto_ack(uint8_t enable)
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{
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if(enable) {
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@ -395,7 +436,9 @@ off(void)
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/* Wait for ongoing TX to complete (e.g. this could be an outgoing ACK) */
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while(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE);
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CC2538_RF_CSP_ISFLUSHRX();
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if(!(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP)) {
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CC2538_RF_CSP_ISFLUSHRX();
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}
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/* Don't turn off if we are off as this will trigger a Strobe Error */
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if(REG(RFCORE_XREG_RXENABLE) != 0) {
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@ -459,10 +502,6 @@ init(void)
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set_channel(rf_channel);
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/* Acknowledge RF interrupts, FIFOP only */
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REG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_FIFOP;
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nvic_interrupt_enable(NVIC_INT_RF_RXTX);
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/* Acknowledge all RF Error interrupts */
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REG(RFCORE_XREG_RFERRM) = RFCORE_XREG_RFERRM_RFERRM;
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nvic_interrupt_enable(NVIC_INT_RF_ERR);
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@ -488,6 +527,8 @@ init(void)
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*/
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udma_set_channel_src(CC2538_RF_CONF_RX_DMA_CHAN, RFCORE_SFR_RFDATA);
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}
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set_poll_mode(poll_mode);
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process_start(&cc2538_rf_process, NULL);
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@ -571,9 +612,11 @@ transmit(unsigned short transmit_len)
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while(RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + ONOFF_TIME));
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}
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if(channel_clear() == CC2538_RF_CCA_BUSY) {
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RIMESTATS_ADD(contentiondrop);
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return RADIO_TX_COLLISION;
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if(send_on_cca) {
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if(channel_clear() == CC2538_RF_CCA_BUSY) {
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RIMESTATS_ADD(contentiondrop);
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return RADIO_TX_COLLISION;
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}
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}
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/*
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@ -630,8 +673,6 @@ read(void *buf, unsigned short bufsize)
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{
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uint8_t i;
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uint8_t len;
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uint8_t crc_corr;
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int8_t rssi;
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PRINTF("RF: Read\n");
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@ -731,14 +772,18 @@ read(void *buf, unsigned short bufsize)
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flush();
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#endif
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/* If FIFOP==1 and FIFO==0 then we had a FIFO overflow at some point. */
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if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP) {
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if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFO) {
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process_poll(&cc2538_rf_process);
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} else {
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CC2538_RF_CSP_ISFLUSHRX();
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if(!poll_mode) {
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/* If FIFOP==1 and FIFO==0 then we had a FIFO overflow at some point. */
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if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP) {
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if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFO) {
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process_poll(&cc2538_rf_process);
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} else {
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CC2538_RF_CSP_ISFLUSHRX();
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}
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}
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}
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CC2538_RF_CSP_ISFLUSHRX();
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return (len);
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}
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@ -796,6 +841,15 @@ get_value(radio_param_t param, radio_value_t *value)
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if(REG(RFCORE_XREG_FRMCTRL0) & RFCORE_XREG_FRMCTRL0_AUTOACK) {
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*value |= RADIO_RX_MODE_AUTOACK;
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}
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if(poll_mode) {
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*value |= RADIO_RX_MODE_POLL_MODE;
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}
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return RADIO_RESULT_OK;
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case RADIO_PARAM_TX_MODE:
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*value = 0;
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if(send_on_cca) {
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*value |= RADIO_TX_MODE_SEND_ON_CCA;
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}
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return RADIO_RESULT_OK;
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case RADIO_PARAM_TXPOWER:
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*value = get_tx_power();
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@ -806,6 +860,12 @@ get_value(radio_param_t param, radio_value_t *value)
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case RADIO_PARAM_RSSI:
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*value = get_rssi();
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return RADIO_RESULT_OK;
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case RADIO_PARAM_LAST_RSSI:
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*value = rssi;
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return RADIO_RESULT_OK;
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case RADIO_PARAM_LAST_LINK_QUALITY:
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*value = crc_corr & LQI_BIT_MASK;
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return RADIO_RESULT_OK;
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case RADIO_CONST_CHANNEL_MIN:
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*value = CC2538_RF_CHANNEL_MIN;
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return RADIO_RESULT_OK;
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@ -854,13 +914,21 @@ set_value(radio_param_t param, radio_value_t value)
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return RADIO_RESULT_OK;
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case RADIO_PARAM_RX_MODE:
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if(value & ~(RADIO_RX_MODE_ADDRESS_FILTER |
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RADIO_RX_MODE_AUTOACK)) {
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RADIO_RX_MODE_AUTOACK |
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RADIO_RX_MODE_POLL_MODE)) {
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return RADIO_RESULT_INVALID_VALUE;
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}
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set_frame_filtering((value & RADIO_RX_MODE_ADDRESS_FILTER) != 0);
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set_auto_ack((value & RADIO_RX_MODE_AUTOACK) != 0);
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set_poll_mode((value & RADIO_RX_MODE_POLL_MODE) != 0);
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return RADIO_RESULT_OK;
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case RADIO_PARAM_TX_MODE:
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if(value & ~(RADIO_TX_MODE_SEND_ON_CCA)) {
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return RADIO_RESULT_INVALID_VALUE;
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}
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set_send_on_cca((value & RADIO_TX_MODE_SEND_ON_CCA) != 0);
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return RADIO_RESULT_OK;
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case RADIO_PARAM_TXPOWER:
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if(value < OUTPUT_POWER_MIN || value > OUTPUT_POWER_MAX) {
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@ -895,6 +963,15 @@ get_object(radio_param_t param, void *dest, size_t size)
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return RADIO_RESULT_OK;
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}
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if(param == RADIO_PARAM_LAST_PACKET_TIMESTAMP) {
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if(size != sizeof(rtimer_clock_t) || !dest) {
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return RADIO_RESULT_INVALID_VALUE;
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}
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*(rtimer_clock_t*)dest = get_sfd_timestamp();
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return RADIO_RESULT_OK;
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}
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return RADIO_RESULT_NOT_SUPPORTED;
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}
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/*---------------------------------------------------------------------------*/
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@ -950,15 +1027,18 @@ PROCESS_THREAD(cc2538_rf_process, ev, data)
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PROCESS_BEGIN();
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while(1) {
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PROCESS_YIELD_UNTIL(ev == PROCESS_EVENT_POLL);
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/* Only if we are not in poll mode oder we are in poll mode and transceiver has to be reset */
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PROCESS_YIELD_UNTIL((!poll_mode || (poll_mode && (rf_flags & RF_MUST_RESET))) && (ev == PROCESS_EVENT_POLL));
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packetbuf_clear();
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len = read(packetbuf_dataptr(), PACKETBUF_SIZE);
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if(!poll_mode) {
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packetbuf_clear();
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len = read(packetbuf_dataptr(), PACKETBUF_SIZE);
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if(len > 0) {
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packetbuf_set_datalen(len);
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if(len > 0) {
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packetbuf_set_datalen(len);
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NETSTACK_RDC.input();
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NETSTACK_RDC.input();
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}
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}
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/* If we were polled due to an RF error, reset the transceiver */
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@ -995,8 +1075,10 @@ void
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cc2538_rf_rx_tx_isr(void)
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{
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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process_poll(&cc2538_rf_process);
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if(!poll_mode) {
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process_poll(&cc2538_rf_process);
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}
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/* We only acknowledge FIFOP so we can safely wipe out the entire SFR */
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REG(RFCORE_SFR_RFIRQF0) = 0;
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@ -1045,4 +1127,44 @@ cc2538_rf_set_promiscous_mode(char p)
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set_frame_filtering(p);
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}
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/*---------------------------------------------------------------------------*/
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uint32_t get_sfd_timestamp(void)
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{
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uint64_t sfd, timer_val, buffer;
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REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMSEL) | 0x00000000;
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REG(RFCORE_SFR_MTCTRL) |= RFCORE_SFR_MTCTRL_LATCH_MODE;
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timer_val = REG(RFCORE_SFR_MTM0) & RFCORE_SFR_MTM0_MTM0;
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timer_val |= ((REG(RFCORE_SFR_MTM1) & RFCORE_SFR_MTM1_MTM1) << 8);
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REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMOVFSEL) | 0x00000000;
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timer_val |= ((REG(RFCORE_SFR_MTMOVF0) & RFCORE_SFR_MTMOVF0_MTMOVF0) << 16);
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timer_val |= ((REG(RFCORE_SFR_MTMOVF1) & RFCORE_SFR_MTMOVF1_MTMOVF1) << 24);
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buffer = REG(RFCORE_SFR_MTMOVF2) & RFCORE_SFR_MTMOVF2_MTMOVF2;
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timer_val |= (buffer << 32);
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REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMSEL) | 0x00000001;
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REG(RFCORE_SFR_MTCTRL) |= RFCORE_SFR_MTCTRL_LATCH_MODE;
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sfd = REG(RFCORE_SFR_MTM0) & RFCORE_SFR_MTM0_MTM0;
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sfd |= ((REG(RFCORE_SFR_MTM1) & RFCORE_SFR_MTM1_MTM1) << 8);
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REG(RFCORE_SFR_MTMSEL) = (REG(RFCORE_SFR_MTMSEL) & ~RFCORE_SFR_MTMSEL_MTMOVFSEL) | 0x00000010;
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sfd |= ((REG(RFCORE_SFR_MTMOVF0) & RFCORE_SFR_MTMOVF0_MTMOVF0) << 16);
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sfd |= ((REG(RFCORE_SFR_MTMOVF1) & RFCORE_SFR_MTMOVF1_MTMOVF1) << 24);
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buffer = REG(RFCORE_SFR_MTMOVF2) & RFCORE_SFR_MTMOVF2_MTMOVF2;
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sfd |= (buffer << 32);
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return (RTIMER_NOW() - RADIO_TO_RTIMER(timer_val - sfd));
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}
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/*---------------------------------------------------------------------------*/
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void mac_timer_init(void)
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{
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CLOCK_STABLE();
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REG(RFCORE_SFR_MTCTRL) |= RFCORE_SFR_MTCTRL_SYNC;
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REG(RFCORE_SFR_MTCTRL) |= RFCORE_SFR_MTCTRL_RUN;
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while(!(REG(RFCORE_SFR_MTCTRL) & RFCORE_SFR_MTCTRL_STATE));
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REG(RFCORE_SFR_MTCTRL) &= ~RFCORE_SFR_MTCTRL_RUN;
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while(REG(RFCORE_SFR_MTCTRL) & RFCORE_SFR_MTCTRL_STATE);
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REG(RFCORE_SFR_MTCTRL) |= RFCORE_SFR_MTCTRL_SYNC;
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REG(RFCORE_SFR_MTCTRL) |= (RFCORE_SFR_MTCTRL_RUN);
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while(!(REG(RFCORE_SFR_MTCTRL) & RFCORE_SFR_MTCTRL_STATE));
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}
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/*---------------------------------------------------------------------------*/
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/** @} */
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@ -65,6 +65,20 @@
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#define RTIMER_ARCH_SECOND 32768
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/* Do the math in 32bits to save precision.
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* Round to nearest integer rather than truncate. */
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#define US_TO_RTIMERTICKS(US) ((US) >= 0 ? \
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(((int32_t)(US) * (RTIMER_ARCH_SECOND) + 500000) / 1000000L) : \
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((int32_t)(US) * (RTIMER_ARCH_SECOND) - 500000) / 1000000L)
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#define RTIMERTICKS_TO_US(T) ((T) >= 0 ? \
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(((int32_t)(T) * 1000000L + ((RTIMER_ARCH_SECOND) / 2)) / (RTIMER_ARCH_SECOND)) : \
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((int32_t)(T) * 1000000L - ((RTIMER_ARCH_SECOND) / 2)) / (RTIMER_ARCH_SECOND))
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/* A 64-bit version because the 32-bit one cannot handle T >= 4295 ticks.
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Intended only for positive values of T. */
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#define RTIMERTICKS_TO_US_64(T) ((uint32_t)(((uint64_t)(T) * 1000000 + ((RTIMER_ARCH_SECOND) / 2)) / (RTIMER_ARCH_SECOND)))
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/** \sa RTIMER_NOW() */
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rtimer_clock_t rtimer_arch_now(void);
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