fix these for the putchr and putstr name changes
This commit is contained in:
Mariano Alvira
parent
52bd134d4a
commit
225fb3e553
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@ -6,14 +6,14 @@
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#define DEBUG 1
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#if DEBUG
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#define dbg_putc(...) putc(__VA_ARGS__)
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#define dbg_puts(...) puts(__VA_ARGS__)
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#define dbg_putchr(...) putchr(__VA_ARGS__)
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#define dbg_putstr(...) putstr(__VA_ARGS__)
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#define dbg_put_hex(...) put_hex(__VA_ARGS__)
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#define dbg_put_hex16(...) put_hex16(__VA_ARGS__)
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#define dbg_put_hex32(...) put_hex32(__VA_ARGS__)
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#else
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#define dbg_putc(...)
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#define dbg_puts(...)
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#define dbg_putchr(...)
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#define dbg_putstr(...)
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#define dbg_put_hex(...)
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#define dbg_put_hex16(...)
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#define dbg_put_hex32(...)
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@ -45,30 +45,30 @@ void main(void) {
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vreg_init();
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dbg_puts("Detecting internal nvm\n\r");
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dbg_putstr("Detecting internal nvm\n\r");
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err = nvm_detect(gNvmInternalInterface_c, &type);
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dbg_puts("nvm_detect returned: 0x");
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dbg_putstr("nvm_detect returned: 0x");
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dbg_put_hex(err);
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dbg_puts(" type is: 0x");
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dbg_putstr(" type is: 0x");
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dbg_put_hex32(type);
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dbg_puts("\n\r");
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dbg_putstr("\n\r");
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/* erase the flash */
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err = nvm_erase(gNvmInternalInterface_c, type, 0x4fffffff);
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dbg_puts("nvm_erase returned: 0x");
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dbg_putstr("nvm_erase returned: 0x");
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dbg_put_hex(err);
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dbg_puts("\n\r");
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dbg_putstr("\n\r");
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dbg_puts(" type is: 0x");
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dbg_putstr(" type is: 0x");
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dbg_put_hex32(type);
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dbg_puts("\n\r");
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dbg_putstr("\n\r");
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/* say we are ready */
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len = 0;
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puts("ready");
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putstr("ready");
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flushrx();
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/* read the length */
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@ -78,9 +78,9 @@ void main(void) {
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len += (c<<(i*8));
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}
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dbg_puts("len: ");
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dbg_putstr("len: ");
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dbg_put_hex32(len);
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dbg_puts("\n\r");
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dbg_putstr("\n\r");
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/* write the OKOK magic */
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@ -92,15 +92,15 @@ void main(void) {
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((uint8_t *)buf)[0] = 'N'; ((uint8_t *)buf)[1] = 'O'; ((uint8_t *)buf)[2] = 'N'; ((uint8_t *)buf)[3] = 'O';
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#endif
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dbg_puts(" type is: 0x");
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dbg_putstr(" type is: 0x");
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dbg_put_hex32(type);
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dbg_puts("\n\r");
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dbg_putstr("\n\r");
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err = nvm_write(gNvmInternalInterface_c, type, (uint8_t *)buf, 0, 4);
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dbg_puts("nvm_write returned: 0x");
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dbg_putstr("nvm_write returned: 0x");
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dbg_put_hex(err);
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dbg_puts("\n\r");
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dbg_putstr("\n\r");
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/* write the length */
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err = nvm_write(gNvmInternalInterface_c, type, (uint8_t *)&len, 4, 4);
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@ -113,7 +113,7 @@ void main(void) {
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err = nvm_write(gNvmInternalInterface_c, type, (uint8_t *)&c, 8+i, 1);
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}
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puts("flasher done\n\r");
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putstr("flasher done\n\r");
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state = SCAN_X; addr=0;
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while((c=getc())) {
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@ -139,11 +139,11 @@ void main(void) {
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} else {
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/* string is data to write */
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data = to_u32(buf);
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puts("writing addr ");
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putstr("writing addr ");
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put_hex32(addr);
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puts(" data ");
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putstr(" data ");
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put_hex32(data);
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puts("\n\r");
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putstr("\n\r");
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err = nvm_write(gNvmInternalInterface_c, 1, (uint8_t *)&data, addr, 4);
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addr += 4;
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}
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@ -16,27 +16,27 @@ void main(void) {
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vreg_init();
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puts("Detecting internal nvm\n\r");
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putstr("Detecting internal nvm\n\r");
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err = nvm_detect(gNvmInternalInterface_c, &type);
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puts("nvm_detect returned: 0x");
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putstr("nvm_detect returned: 0x");
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put_hex(err);
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puts(" type is: 0x");
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putstr(" type is: 0x");
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put_hex32(type);
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puts("\n\r");
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putstr("\n\r");
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nvm_setsvar(0);
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err = nvm_read(gNvmInternalInterface_c, type, (uint8_t *)buf, READ_ADDR, READ_NBYTES);
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puts("nvm_read returned: 0x");
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putstr("nvm_read returned: 0x");
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put_hex(err);
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puts("\n\r");
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putstr("\n\r");
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for(i=0; i<READ_NBYTES/4; i++) {
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puts("0x");
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putstr("0x");
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put_hex32(buf[i]);
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puts("\n\r");
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putstr("\n\r");
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}
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@ -16,46 +16,46 @@ void main(void) {
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vreg_init();
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puts("Detecting internal nvm\n\r");
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putstr("Detecting internal nvm\n\r");
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err = nvm_detect(gNvmInternalInterface_c, &type);
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puts("nvm_detect returned: 0x");
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putstr("nvm_detect returned: 0x");
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put_hex(err);
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puts(" type is: 0x");
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putstr(" type is: 0x");
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put_hex32(type);
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puts("\n\r");
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putstr("\n\r");
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buf[0] = WRITEVAL0;
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buf[1] = WRITEVAL1;
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err = nvm_erase(gNvmInternalInterface_c, type, 0x40000000); /* erase sector 30 --- sector 31 is the 'secret zone' */
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puts("nvm_erase returned: 0x");
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putstr("nvm_erase returned: 0x");
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put_hex(err);
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puts("\n\r");
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putstr("\n\r");
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err = nvm_write(gNvmInternalInterface_c, type, (uint8_t *)buf, WRITE_ADDR, WRITE_NBYTES);
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puts("nvm_write returned: 0x");
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putstr("nvm_write returned: 0x");
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put_hex(err);
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puts("\n\r");
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puts("writing\n\r");
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putstr("\n\r");
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putstr("writing\n\r");
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for(i=0; i<WRITE_NBYTES/4; i++) {
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puts("0x");
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putstr("0x");
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put_hex32(buf[i]);
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puts("\n\r");
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putstr("\n\r");
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buf[i] = 0x00000000; /* clear buf for the read */
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}
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err = nvm_read(gNvmInternalInterface_c, type, (uint8_t *)buf, WRITE_ADDR, WRITE_NBYTES);
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puts("nvm_read returned: 0x");
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putstr("nvm_read returned: 0x");
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put_hex(err);
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puts("\n\r");
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puts("reading\n\r");
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putstr("\n\r");
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putstr("reading\n\r");
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for(i=0; i<WRITE_NBYTES/4; i++) {
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puts("0x");
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putstr("0x");
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put_hex32(buf[i]);
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puts("\n\r");
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putstr("\n\r");
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}
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@ -10,7 +10,7 @@ void main(void) {
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uart_init(INC, MOD);
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for(data = DUMP_BASE; data < ((uint8_t *)(DUMP_BASE+DUMP_LEN)); data++) {
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putc(*data);
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putchr(*data);
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}
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while(1);
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@ -13,19 +13,19 @@ void main(void) {
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*mem32(0x0040fffc) = 0xface00ff;
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*mem32(0x00410000) = 0xabcd0123;
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puts("sleep test\n\r");
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puts("0x00401ffc: ");
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putstr("sleep test\n\r");
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putstr("0x00401ffc: ");
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put_hex32(*mem32(0x00401ffc));
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puts("\r\n");
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puts("0x00407ffc: ");
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putstr("\r\n");
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putstr("0x00407ffc: ");
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put_hex32(*mem32(0x00407ffc));
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puts("\r\n");
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puts("0x0040fffc: ");
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putstr("\r\n");
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putstr("0x0040fffc: ");
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put_hex32(*mem32(0x0040fffc));
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puts("\r\n");
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puts("0x00410000: ");
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putstr("\r\n");
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putstr("0x00410000: ");
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put_hex32(*mem32(0x00410000));
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puts("\r\n");
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putstr("\r\n");
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/* radio must be OFF before sleeping */
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/* otherwise MCU will not wake up properly */
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@ -34,7 +34,7 @@ void main(void) {
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#if USE_32KHZ
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/* turn on the 32kHz crystal */
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puts("enabling 32kHz crystal\n\r");
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putstr("enabling 32kHz crystal\n\r");
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/* you have to hold it's hand with this on */
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/* once you start the 32xHz crystal it can only be stopped with a reset (hard or soft) */
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/* first, disable the ring osc */
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@ -49,14 +49,14 @@ void main(void) {
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{
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static volatile uint32_t old;
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old = *CRM_RTC_COUNT;
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puts("waiting for xtal\n\r");
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putstr("waiting for xtal\n\r");
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while(*CRM_RTC_COUNT == old) {
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continue;
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}
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/* RTC has started up */
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set_bit(*CRM_SYS_CNTL,5);
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puts("32kHZ xtal started\n\r");
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putstr("32kHZ xtal started\n\r");
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}
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#endif
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@ -105,19 +105,19 @@ void main(void) {
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/* write 1 to sleep_sync --- this clears the bit (it's a r1wc bit) and finishes wakeup */
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*CRM_STATUS = 1;
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puts("\n\r\n\r\n\r");
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puts("0x00401ffc: ");
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putstr("\n\r\n\r\n\r");
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putstr("0x00401ffc: ");
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put_hex32(*mem32(0x00401ffc));
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puts("\r\n");
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puts("0x00407ffc: ");
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putstr("\r\n");
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putstr("0x00407ffc: ");
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put_hex32(*mem32(0x00407ffc));
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puts("\r\n");
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puts("0x0040fffc: ");
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putstr("\r\n");
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putstr("0x0040fffc: ");
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put_hex32(*mem32(0x0040fffc));
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puts("\r\n");
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puts("0x00410000: ");
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putstr("\r\n");
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putstr("0x00410000: ");
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put_hex32(*mem32(0x00410000));
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puts("\r\n");
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putstr("\r\n");
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*GPIO_PAD_DIR0 = LED_RED;
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#define DELAY 400000
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