deac/osd-contiki
1
0
Fork 0
Code Issues Pull requests Releases Wiki Activity

Use additive offsets

Browse source 
OR-ing an offset to a base address instead of adding it is dangerous
because it can only work if the base address is aligned enough for the
offset.

Moreover, if the base address or the offset has a value unknown at
compile time, then the assembly instructions dedicated to 'base +
offset' addressing on most CPUs can't be emitted by the compiler because
this would require the alignment of the base address against the offset
to be known in order to optimize 'base | offset' into 'base + offset'.
In that case, the compiler has to emit more instructions in order to
compute 'base | offset' on most CPUs, e.g. on ARM, which means larger
binary size and slower execution.

Hence, replace all occurrences of 'base | offset' with 'base + offset'.
This must become a coding rule.

Here are the results for the cc2538-demo example:
 - Compilation of uart_init():
    * before:
        REG(regs->base | UART_CC) = 0;
        200b78:	f446 637c 	orr.w	r3, r6, #4032	; 0xfc0
        200b7c:	f043 0308 	orr.w	r3, r3, #8
        200b80:	2200      	movs	r2, #0
        200b82:	601a      	str	r2, [r3, #0]

    * now:
        REG(regs->base + UART_CC) = 0;
        200b7a:	2300      	movs	r3, #0
        200b7c:	f8c4 3fc8 	str.w	r3, [r4, #4040]	; 0xfc8

 - Size of the .text section:
    * before:	0x4c7c
    * now:	0x4c28
    * saved:	84 bytes

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
This commit is contained in:
Benoît Thébaudeau 2015-03-28 17:16:17 +01:00
parent c76316adf2
commit 19fd7a3551
7 changed files with 65 additions and 65 deletions
Download patch file Download diff file Expand all files Collapse all files

44
cpu/cc2538/dev/gpio.h
View file

@ -91,28 +91,28 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_SET_INPUT(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_DIR) &= ~(PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_DIR) &= ~(PIN_MASK); } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE to output.
* \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_SET_OUTPUT(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_DIR) |= (PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_DIR) |= (PIN_MASK); } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE high.
* \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_SET_PIN(PORT_BASE, PIN_MASK) \
do { REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2)) = 0xFF; } while(0)
do { REG((PORT_BASE) + GPIO_DATA + ((PIN_MASK) << 2)) = 0xFF; } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE low.
* \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_CLR_PIN(PORT_BASE, PIN_MASK) \
do { REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2)) = 0x00; } while(0)
do { REG((PORT_BASE) + GPIO_DATA + ((PIN_MASK) << 2)) = 0x00; } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE to value.
* \param PORT_BASE GPIO Port register offset
@ -133,7 +133,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* and then use 0x0A as the value ((1 << 3) | (1 << 1) for pins 3 and 1)
*/
#define GPIO_WRITE_PIN(PORT_BASE, PIN_MASK, value) \
do { REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2)) = (value); } while(0)
do { REG((PORT_BASE) + GPIO_DATA + ((PIN_MASK) << 2)) = (value); } while(0)
/** \brief Read pins with PIN_MASK of port with PORT_BASE.
* \param PORT_BASE GPIO Port register offset
@ -146,21 +146,21 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* the macro will return 0x81.
*/
#define GPIO_READ_PIN(PORT_BASE, PIN_MASK) \
REG(((PORT_BASE) | GPIO_DATA) + ((PIN_MASK) << 2))
REG((PORT_BASE) + GPIO_DATA + ((PIN_MASK) << 2))
/** \brief Set pins with PIN_MASK of port with PORT_BASE to detect edge.
* \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_DETECT_EDGE(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_IS) &= ~(PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_IS) &= ~(PIN_MASK); } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE to detect level.
* \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_DETECT_LEVEL(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_IS) |= (PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_IS) |= (PIN_MASK); } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE to trigger an
* interrupt on both edges.
@ -168,7 +168,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_TRIGGER_BOTH_EDGES(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_IBE) |= (PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_IBE) |= (PIN_MASK); } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE to trigger an
* interrupt on single edge (controlled by GPIO_IEV).
@ -176,7 +176,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_TRIGGER_SINGLE_EDGE(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_IBE) &= ~(PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_IBE) &= ~(PIN_MASK); } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE to trigger an
* interrupt on rising edge.
@ -184,7 +184,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_DETECT_RISING(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_IEV) |= (PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_IEV) |= (PIN_MASK); } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE to trigger an
* interrupt on falling edge.
@ -192,7 +192,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_DETECT_FALLING(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_IEV) &= ~(PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_IEV) &= ~(PIN_MASK); } while(0)
/** \brief Enable interrupt triggering for pins with PIN_MASK of port with
* PORT_BASE.
@ -200,7 +200,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_ENABLE_INTERRUPT(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_IE) |= (PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_IE) |= (PIN_MASK); } while(0)
/** \brief Disable interrupt triggering for pins with PIN_MASK of port with
* PORT_BASE.
@ -208,7 +208,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_DISABLE_INTERRUPT(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_IE) &= ~(PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_IE) &= ~(PIN_MASK); } while(0)
/** \brief Clear interrupt triggering for pins with PIN_MASK of port with
* PORT_BASE.
@ -216,7 +216,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_CLEAR_INTERRUPT(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_IC) = (PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_IC) = (PIN_MASK); } while(0)
/** \brief Configure the pin to be under peripheral control with PIN_MASK of
* port with PORT_BASE.
@ -224,7 +224,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_PERIPHERAL_CONTROL(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_AFSEL) |= (PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_AFSEL) |= (PIN_MASK); } while(0)
/** \brief Configure the pin to be software controlled with PIN_MASK of port
* with PORT_BASE.
@ -232,7 +232,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_SOFTWARE_CONTROL(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE) | GPIO_AFSEL) &= ~(PIN_MASK); } while(0)
do { REG((PORT_BASE) + GPIO_AFSEL) &= ~(PIN_MASK); } while(0)
/** \brief Set pins with PIN_MASK of port PORT to trigger a power-up interrupt
* on rising edge.
@ -240,7 +240,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_POWER_UP_ON_RISING(PORT, PIN_MASK) \
do { REG(GPIO_PORT_TO_BASE(PORT) | GPIO_P_EDGE_CTRL) &= \
do { REG(GPIO_PORT_TO_BASE(PORT) + GPIO_P_EDGE_CTRL) &= \
~((PIN_MASK) << ((PORT) << 3)); } while(0)
/** \brief Set pins with PIN_MASK of port PORT to trigger a power-up interrupt
@ -249,7 +249,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_POWER_UP_ON_FALLING(PORT, PIN_MASK) \
do { REG(GPIO_PORT_TO_BASE(PORT) | GPIO_P_EDGE_CTRL) |= \
do { REG(GPIO_PORT_TO_BASE(PORT) + GPIO_P_EDGE_CTRL) |= \
(PIN_MASK) << ((PORT) << 3); } while(0)
/** \brief Enable power-up interrupt triggering for pins with PIN_MASK of port
@ -258,7 +258,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_ENABLE_POWER_UP_INTERRUPT(PORT, PIN_MASK) \
do { REG(GPIO_PORT_TO_BASE(PORT) | GPIO_PI_IEN) |= \
do { REG(GPIO_PORT_TO_BASE(PORT) + GPIO_PI_IEN) |= \
(PIN_MASK) << ((PORT) << 3); } while(0)
/** \brief Disable power-up interrupt triggering for pins with PIN_MASK of port
@ -267,7 +267,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_DISABLE_POWER_UP_INTERRUPT(PORT, PIN_MASK) \
do { REG(GPIO_PORT_TO_BASE(PORT) | GPIO_PI_IEN) &= \
do { REG(GPIO_PORT_TO_BASE(PORT) + GPIO_PI_IEN) &= \
~((PIN_MASK) << ((PORT) << 3)); } while(0)
/** \brief Clear power-up interrupt triggering for pins with PIN_MASK of port
@ -276,7 +276,7 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_CLEAR_POWER_UP_INTERRUPT(PORT, PIN_MASK) \
do { REG(GPIO_PORT_TO_BASE(PORT) | GPIO_IRQ_DETECT_ACK) = \
do { REG(GPIO_PORT_TO_BASE(PORT) + GPIO_IRQ_DETECT_ACK) = \
(PIN_MASK) << ((PORT) << 3); } while(0)
/**