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Clean up after testing

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dak664 2010-02-26 20:51:48 +00:00
parent b5b77ac47a
commit 195f5939c4
1 changed files with 11 additions and 10 deletions
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21
cpu/avr/rtimer-arch.c
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@ -28,7 +28,7 @@
* *
* This file is part of the Contiki operating system. * This file is part of the Contiki operating system.
* *
* $Id: rtimer-arch.c,v 1.8 2010/02/22 22:21:15 dak664 Exp $ * $Id: rtimer-arch.c,v 1.9 2010/02/26 20:51:48 dak664 Exp $
*/ */
/** /**
@ -57,8 +57,10 @@
#define TICIE3 ICIE3 #define TICIE3 ICIE3
//Has no 'C', so we just set it to B. The code doesn't really use C so this //Has no 'C', so we just set it to B. The code doesn't really use C so this
//is safe to do but lets it compile //is safe to do but lets it compile. Probably should enable the warning if
#warning No OCIE3C in architecture, hopefully it will not be needed //it is ever used on other platforms.
//#warning no OCIE3C in timer3 architecture, hopefully it won't be needed!
#define OCIE3C OCIE3B #define OCIE3C OCIE3B
#define OCF3C OCF3B #define OCF3C OCF3B
#endif #endif
@ -69,7 +71,6 @@
#define ETIFR TIFR3 #define ETIFR TIFR3
#define TICIE3 ICIE3 #define TICIE3 ICIE3
#endif #endif
uint8_t rtimerworks;
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
#ifdef TCNT3 #ifdef TCNT3
ISR (TIMER3_COMPA_vect) { ISR (TIMER3_COMPA_vect) {
@ -77,7 +78,7 @@ ISR (TIMER3_COMPA_vect) {
ETIMSK &= ~((1 << OCIE3A) | (1 << OCIE3B) | (1 << TOIE3) | ETIMSK &= ~((1 << OCIE3A) | (1 << OCIE3B) | (1 << TOIE3) |
(1 << TICIE3) | (1 << OCIE3C)); (1 << TICIE3) | (1 << OCIE3C));
rtimerworks++;
/* Call rtimer callback */ /* Call rtimer callback */
rtimer_run_next(); rtimer_run_next();
@ -98,10 +99,10 @@ rtimer_arch_init(void)
cli (); cli ();
#ifdef TCNT3 #ifdef TCNT3
rtimerworks=240; /* Disable all timer functions */
ETIMSK &= ~((1 << OCIE3A) | (1 << OCIE3B) | (1 << TOIE3) | ETIMSK &= ~((1 << OCIE3A) | (1 << OCIE3B) | (1 << TOIE3) |
(1 << TICIE3) | (1 << OCIE3C)); (1 << TICIE3) | (1 << OCIE3C));
/* Write 1s to clear existing timer function flags */
ETIFR |= (1 << ICF3) | (1 << OCF3A) | (1 << OCF3B) | (1 << TOV3) | ETIFR |= (1 << ICF3) | (1 << OCF3A) | (1 << OCF3B) | (1 << TOV3) |
(1 << OCF3C); (1 << OCF3C);
@ -113,7 +114,7 @@ rtimerworks=240;
/* Reset counter */ /* Reset counter */
TCNT3 = 0; TCNT3 = 0;
/* Maximum prescaler */ /* Start clock, maximum prescaler */
TCCR3B |= 5; TCCR3B |= 5;
#else #else
@ -134,11 +135,12 @@ rtimer_arch_schedule(rtimer_clock_t t)
cli (); cli ();
#ifdef TCNT3 #ifdef TCNT3
rtimerworks=250;
/* Set compare register */ /* Set compare register */
OCR3A = t; OCR3A = t;
/* Write 1s to clear all timer function flags */
ETIFR |= (1 << ICF3) | (1 << OCF3A) | (1 << OCF3B) | (1 << TOV3) | ETIFR |= (1 << ICF3) | (1 << OCF3A) | (1 << OCF3B) | (1 << TOV3) |
(1 << OCF3C); (1 << OCF3C);
/* Enable interrupt on OCR3A match */
ETIMSK |= (1 << OCIE3A); ETIMSK |= (1 << OCIE3A);
#else #else
@ -148,5 +150,4 @@ rtimerworks=250;
/* Restore interrupt state */ /* Restore interrupt state */
SREG = sreg; SREG = sreg;
// printf("rs%d",t);
} }