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galileo: Fix code style violations

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This commit is contained in:
Michael LeMay 2015-12-19 17:28:27 -08:00 committed by Jesus Sanchez-Palencia
parent e14761c26b
commit 13be942d40
3 changed files with 117 additions and 89 deletions
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81
platform/galileo/drivers/galileo-pinmux.c
View file

@ -535,70 +535,83 @@ galileo_pinmux_set_pin(uint8_t pin, GALILEO_PINMUX_FUNC func)
struct mux_path *mux_path; struct mux_path *mux_path;
uint8_t index, i; uint8_t index, i;
if (pin > PINMUX_NUM_PINS) if(pin > PINMUX_NUM_PINS) {
return -1; return -1;
}
index = PINMUX_NUM_FUNCS * pin; index = PINMUX_NUM_FUNCS * pin;
index += func; index += func;
mux_path = &galileo_pinmux_paths[index]; mux_path = &galileo_pinmux_paths[index];
for (i = 0; i < PINMUX_NUM_PATHS; i++) { for(i = 0; i < PINMUX_NUM_PATHS; i++) {
switch(mux_path->path[i].chip) { switch(mux_path->path[i].chip) {
case EXP0: case EXP0:
if (gpio_pcal9535a_write(&data.exp0, mux_path->path[i].pin, mux_path->path[i].level) < 0) if(gpio_pcal9535a_write(&data.exp0, mux_path->path[i].pin, mux_path->path[i].level) < 0) {
return -1; return -1;
if (gpio_pcal9535a_config(&data.exp0, mux_path->path[i].pin, mux_path->path[i].cfg) < 0) }
return -1; if(gpio_pcal9535a_config(&data.exp0, mux_path->path[i].pin, mux_path->path[i].cfg) < 0) {
break; return -1;
case EXP1: }
if (gpio_pcal9535a_write(&data.exp1, mux_path->path[i].pin, mux_path->path[i].level) < 0) break;
return -1; case EXP1:
if (gpio_pcal9535a_config(&data.exp1, mux_path->path[i].pin, mux_path->path[i].cfg) < 0) if(gpio_pcal9535a_write(&data.exp1, mux_path->path[i].pin, mux_path->path[i].level) < 0) {
return -1; return -1;
break; }
case EXP2: if(gpio_pcal9535a_config(&data.exp1, mux_path->path[i].pin, mux_path->path[i].cfg) < 0) {
if (gpio_pcal9535a_write(&data.exp2, mux_path->path[i].pin, mux_path->path[i].level) < 0) return -1;
return -1; }
if (gpio_pcal9535a_config(&data.exp2, mux_path->path[i].pin, mux_path->path[i].cfg) < 0) break;
return -1; case EXP2:
break; if(gpio_pcal9535a_write(&data.exp2, mux_path->path[i].pin, mux_path->path[i].level) < 0) {
case PWM0: return -1;
if (pwm_pca9685_set_duty_cycle(&data.pwm0, mux_path->path[i].pin, mux_path->path[i].level ? 100 : 0) < 0) }
return -1; if(gpio_pcal9535a_config(&data.exp2, mux_path->path[i].pin, mux_path->path[i].cfg) < 0) {
break; return -1;
case NONE: }
break; break;
case PWM0:
if(pwm_pca9685_set_duty_cycle(&data.pwm0, mux_path->path[i].pin, mux_path->path[i].level ? 100 : 0) < 0) {
return -1;
}
break;
case NONE:
break;
} }
} }
return 0; return 0;
} }
int int
galileo_pinmux_initialize(void) galileo_pinmux_initialize(void)
{ {
uint8_t i; uint8_t i;
/* has to init after I2C master */ /* has to init after I2C master */
if (!quarkX1000_i2c_is_available()) if(!quarkX1000_i2c_is_available()) {
return -1; return -1;
}
if (gpio_pcal9535a_init(&data.exp0, GPIO_PCAL9535A_0_I2C_ADDR) < 0) if(gpio_pcal9535a_init(&data.exp0, GPIO_PCAL9535A_0_I2C_ADDR) < 0) {
return -1; return -1;
}
if (gpio_pcal9535a_init(&data.exp1, GPIO_PCAL9535A_1_I2C_ADDR) < 0) if(gpio_pcal9535a_init(&data.exp1, GPIO_PCAL9535A_1_I2C_ADDR) < 0) {
return -1; return -1;
}
if (gpio_pcal9535a_init(&data.exp2, GPIO_PCAL9535A_2_I2C_ADDR) < 0) if(gpio_pcal9535a_init(&data.exp2, GPIO_PCAL9535A_2_I2C_ADDR) < 0) {
return -1; return -1;
}
if (pwm_pca9685_init(&data.pwm0, PWM_PCA9685_0_I2C_ADDR) < 0) if(pwm_pca9685_init(&data.pwm0, PWM_PCA9685_0_I2C_ADDR) < 0) {
return -1; return -1;
}
for (i = 0; i < PINMUX_NUM_PINS; i++) { for(i = 0; i < PINMUX_NUM_PINS; i++) {
if (galileo_pinmux_set_pin(default_pinmux_config[i].pin_num, default_pinmux_config[i].func) < 0) if(galileo_pinmux_set_pin(default_pinmux_config[i].pin_num, default_pinmux_config[i].func) < 0) {
return -1; return -1;
}
} }
return 0; return 0;

103
platform/galileo/drivers/gpio-pcal9535a.c
View file

@ -70,34 +70,36 @@ read_port_regs(struct gpio_pcal9535a_data *data, uint8_t reg, union gpio_pcal953
buf->byte[0] = reg; buf->byte[0] = reg;
buf->byte[1] = 0; buf->byte[1] = 0;
if (quarkX1000_i2c_write(buf->byte, 1, data->i2c_slave_addr) < 0) if(quarkX1000_i2c_write(buf->byte, 1, data->i2c_slave_addr) < 0) {
return -1; return -1;
}
do { do {
clock_wait(READ_PORT_TIMEOUT); clock_wait(READ_PORT_TIMEOUT);
r = quarkX1000_i2c_read(buf->byte, 2, data->i2c_slave_addr); r = quarkX1000_i2c_read(buf->byte, 2, data->i2c_slave_addr);
if (r == 0) if(r == 0) {
break; break;
} while (tries--); }
} while(tries--);
if (r < 0) if(r < 0) {
return -1; return -1;
}
return 0; return 0;
} }
static int static int
write_port_regs(struct gpio_pcal9535a_data *data, uint8_t reg, union gpio_pcal9535a_port_data *buf) write_port_regs(struct gpio_pcal9535a_data *data, uint8_t reg, union gpio_pcal9535a_port_data *buf)
{ {
uint8_t cmd[] = {reg, buf->byte[0], buf->byte[1]}; uint8_t cmd[] = { reg, buf->byte[0], buf->byte[1] };
if (quarkX1000_i2c_polling_write(cmd, sizeof(cmd), data->i2c_slave_addr) < 0) if(quarkX1000_i2c_polling_write(cmd, sizeof(cmd), data->i2c_slave_addr) < 0) {
return -1; return -1;
}
return 0; return 0;
} }
static int static int
setup_pin_dir(struct gpio_pcal9535a_data *data, uint32_t pin, int flags) setup_pin_dir(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
{ {
@ -106,47 +108,49 @@ setup_pin_dir(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
bit_mask = 1 << pin; bit_mask = 1 << pin;
if ((flags & QUARKX1000_GPIO_DIR_MASK) == QUARKX1000_GPIO_IN) if((flags & QUARKX1000_GPIO_DIR_MASK) == QUARKX1000_GPIO_IN) {
new_value = 1 << pin; new_value = 1 << pin;
}
port->all &= ~bit_mask; port->all &= ~bit_mask;
port->all |= new_value; port->all |= new_value;
return write_port_regs(data, REG_CONF_PORT0, port); return write_port_regs(data, REG_CONF_PORT0, port);
} }
static int static int
setup_pin_pullupdown(struct gpio_pcal9535a_data *data, uint32_t pin, int flags) setup_pin_pullupdown(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
{ {
union gpio_pcal9535a_port_data *port; union gpio_pcal9535a_port_data *port;
uint16_t bit_mask, new_value = 0; uint16_t bit_mask, new_value = 0;
if ((flags & QUARKX1000_GPIO_PUD_MASK) != QUARKX1000_GPIO_PUD_NORMAL) { if((flags & QUARKX1000_GPIO_PUD_MASK) != QUARKX1000_GPIO_PUD_NORMAL) {
port = &data->reg_cache.pud_sel; port = &data->reg_cache.pud_sel;
bit_mask = 1 << pin; bit_mask = 1 << pin;
if ((flags & QUARKX1000_GPIO_PUD_MASK) == QUARKX1000_GPIO_PUD_PULL_UP) if((flags & QUARKX1000_GPIO_PUD_MASK) == QUARKX1000_GPIO_PUD_PULL_UP) {
new_value = 1 << pin; new_value = 1 << pin;
}
port->all &= ~bit_mask; port->all &= ~bit_mask;
port->all |= new_value; port->all |= new_value;
if (write_port_regs(data, REG_PUD_SEL_PORT0, port) < 0) if(write_port_regs(data, REG_PUD_SEL_PORT0, port) < 0) {
return -1; return -1;
}
} }
port = &data->reg_cache.pud_en; port = &data->reg_cache.pud_en;
bit_mask = 1 << pin; bit_mask = 1 << pin;
if ((flags & QUARKX1000_GPIO_PUD_MASK) != QUARKX1000_GPIO_PUD_NORMAL) if((flags & QUARKX1000_GPIO_PUD_MASK) != QUARKX1000_GPIO_PUD_NORMAL) {
new_value = 1 << pin; new_value = 1 << pin;
}
port->all &= ~bit_mask; port->all &= ~bit_mask;
port->all |= new_value; port->all |= new_value;
return write_port_regs(data, REG_PUD_EN_PORT0, port); return write_port_regs(data, REG_PUD_EN_PORT0, port);
} }
static int static int
setup_pin_polarity(struct gpio_pcal9535a_data *data, uint32_t pin, int flags) setup_pin_polarity(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
{ {
@ -155,28 +159,30 @@ setup_pin_polarity(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
bit_mask = 1 << pin; bit_mask = 1 << pin;
if ((flags & QUARKX1000_GPIO_POL_MASK) == QUARKX1000_GPIO_POL_INV) if((flags & QUARKX1000_GPIO_POL_MASK) == QUARKX1000_GPIO_POL_INV) {
new_value = 1 << pin; new_value = 1 << pin;
}
port->all &= ~bit_mask; port->all &= ~bit_mask;
port->all |= new_value; port->all |= new_value;
if (write_port_regs(data, REG_POL_INV_PORT0, port) < 0) if(write_port_regs(data, REG_POL_INV_PORT0, port) < 0) {
return -1; return -1;
}
data->out_pol_inv = port->all; data->out_pol_inv = port->all;
return 0; return 0;
} }
int int
gpio_pcal9535a_write(struct gpio_pcal9535a_data *data, uint32_t pin, uint32_t value) gpio_pcal9535a_write(struct gpio_pcal9535a_data *data, uint32_t pin, uint32_t value)
{ {
union gpio_pcal9535a_port_data *port = &data->reg_cache.output; union gpio_pcal9535a_port_data *port = &data->reg_cache.output;
uint16_t bit_mask, new_value; uint16_t bit_mask, new_value;
if (!quarkX1000_i2c_is_available()) if(!quarkX1000_i2c_is_available()) {
return -1; return -1;
}
bit_mask = 1 << pin; bit_mask = 1 << pin;
@ -189,41 +195,44 @@ gpio_pcal9535a_write(struct gpio_pcal9535a_data *data, uint32_t pin, uint32_t va
return write_port_regs(data, REG_OUTPUT_PORT0, port); return write_port_regs(data, REG_OUTPUT_PORT0, port);
} }
int int
gpio_pcal9535a_read(struct gpio_pcal9535a_data *data, uint32_t pin, uint32_t *value) gpio_pcal9535a_read(struct gpio_pcal9535a_data *data, uint32_t pin, uint32_t *value)
{ {
union gpio_pcal9535a_port_data buf; union gpio_pcal9535a_port_data buf;
if (!quarkX1000_i2c_is_available()) if(!quarkX1000_i2c_is_available()) {
return -1; return -1;
}
if (read_port_regs(data, REG_INPUT_PORT0, &buf) < 0) if(read_port_regs(data, REG_INPUT_PORT0, &buf) < 0) {
return -1; return -1;
}
*value = (buf.all >> pin) & 0x01; *value = (buf.all >> pin) & 0x01;
return 0; return 0;
} }
int int
gpio_pcal9535a_config(struct gpio_pcal9535a_data *data, uint32_t pin, int flags) gpio_pcal9535a_config(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
{ {
if (!quarkX1000_i2c_is_available()) if(!quarkX1000_i2c_is_available()) {
return -1; return -1;
}
if (setup_pin_dir(data, pin, flags) < 0) if(setup_pin_dir(data, pin, flags) < 0) {
return -1; return -1;
}
if (setup_pin_polarity(data, pin, flags) < 0) if(setup_pin_polarity(data, pin, flags) < 0) {
return -1; return -1;
}
if (setup_pin_pullupdown(data, pin, flags) < 0) if(setup_pin_pullupdown(data, pin, flags) < 0) {
return -1; return -1;
}
return 0; return 0;
} }
static int static int
setup_port_dir(struct gpio_pcal9535a_data *data, uint32_t pin, int flags) setup_port_dir(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
{ {
@ -233,18 +242,18 @@ setup_port_dir(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
return write_port_regs(data, REG_CONF_PORT0, port); return write_port_regs(data, REG_CONF_PORT0, port);
} }
static int static int
setup_port_pullupdown(struct gpio_pcal9535a_data *data, uint32_t pin, int flags) setup_port_pullupdown(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
{ {
union gpio_pcal9535a_port_data *port; union gpio_pcal9535a_port_data *port;
if ((flags & QUARKX1000_GPIO_PUD_MASK) != QUARKX1000_GPIO_PUD_NORMAL) { if((flags & QUARKX1000_GPIO_PUD_MASK) != QUARKX1000_GPIO_PUD_NORMAL) {
port = &data->reg_cache.pud_sel; port = &data->reg_cache.pud_sel;
port->all = ((flags & QUARKX1000_GPIO_PUD_MASK) == QUARKX1000_GPIO_PUD_PULL_UP) ? 0xFFFF : 0x0; port->all = ((flags & QUARKX1000_GPIO_PUD_MASK) == QUARKX1000_GPIO_PUD_PULL_UP) ? 0xFFFF : 0x0;
if (write_port_regs(data, REG_PUD_SEL_PORT0, port) < 0) if(write_port_regs(data, REG_PUD_SEL_PORT0, port) < 0) {
return -1; return -1;
}
} }
port = &data->reg_cache.pud_en; port = &data->reg_cache.pud_en;
@ -252,7 +261,6 @@ setup_port_pullupdown(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
return write_port_regs(data, REG_PUD_EN_PORT0, port); return write_port_regs(data, REG_PUD_EN_PORT0, port);
} }
static int static int
setup_port_polarity(struct gpio_pcal9535a_data *data, uint32_t pin, int flags) setup_port_polarity(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
{ {
@ -260,22 +268,23 @@ setup_port_polarity(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
port->all = ((flags & QUARKX1000_GPIO_POL_MASK) == QUARKX1000_GPIO_POL_INV) ? 0xFFFF : 0x0; port->all = ((flags & QUARKX1000_GPIO_POL_MASK) == QUARKX1000_GPIO_POL_INV) ? 0xFFFF : 0x0;
if (write_port_regs(data, REG_POL_INV_PORT0, port) < 0) if(write_port_regs(data, REG_POL_INV_PORT0, port) < 0) {
return -1; return -1;
}
data->out_pol_inv = port->all; data->out_pol_inv = port->all;
return 0; return 0;
} }
int int
gpio_pcal9535a_write_port(struct gpio_pcal9535a_data *data, uint32_t pin, uint32_t value) gpio_pcal9535a_write_port(struct gpio_pcal9535a_data *data, uint32_t pin, uint32_t value)
{ {
union gpio_pcal9535a_port_data *port = &data->reg_cache.output; union gpio_pcal9535a_port_data *port = &data->reg_cache.output;
uint16_t bit_mask, new_value; uint16_t bit_mask, new_value;
if (!quarkX1000_i2c_is_available()) if(!quarkX1000_i2c_is_available()) {
return -1; return -1;
}
port->all = value; port->all = value;
bit_mask = data->out_pol_inv; bit_mask = data->out_pol_inv;
@ -289,47 +298,51 @@ gpio_pcal9535a_write_port(struct gpio_pcal9535a_data *data, uint32_t pin, uint32
return write_port_regs(data, REG_OUTPUT_PORT0, port); return write_port_regs(data, REG_OUTPUT_PORT0, port);
} }
int int
gpio_pcal9535a_read_port(struct gpio_pcal9535a_data *data, uint32_t pin, uint32_t *value) gpio_pcal9535a_read_port(struct gpio_pcal9535a_data *data, uint32_t pin, uint32_t *value)
{ {
union gpio_pcal9535a_port_data buf; union gpio_pcal9535a_port_data buf;
if (!quarkX1000_i2c_is_available()) if(!quarkX1000_i2c_is_available()) {
return -1; return -1;
}
if (read_port_regs(data, REG_INPUT_PORT0, &buf) < 0) if(read_port_regs(data, REG_INPUT_PORT0, &buf) < 0) {
return -1; return -1;
}
*value = buf.all; *value = buf.all;
return 0; return 0;
} }
int int
gpio_pcal9535a_config_port(struct gpio_pcal9535a_data *data, uint32_t pin, int flags) gpio_pcal9535a_config_port(struct gpio_pcal9535a_data *data, uint32_t pin, int flags)
{ {
if (!quarkX1000_i2c_is_available()) if(!quarkX1000_i2c_is_available()) {
return -1; return -1;
}
if (setup_port_dir(data, pin, flags) < 0) if(setup_port_dir(data, pin, flags) < 0) {
return -1; return -1;
}
if (setup_port_polarity(data, pin, flags) < 0) if(setup_port_polarity(data, pin, flags) < 0) {
return -1; return -1;
}
if (setup_port_pullupdown(data, pin, flags) < 0) if(setup_port_pullupdown(data, pin, flags) < 0) {
return -1; return -1;
}
return 0; return 0;
} }
int int
gpio_pcal9535a_init(struct gpio_pcal9535a_data *data, uint16_t i2c_slave_addr) gpio_pcal9535a_init(struct gpio_pcal9535a_data *data, uint16_t i2c_slave_addr)
{ {
/* has to init after I2C master */ /* has to init after I2C master */
if (!quarkX1000_i2c_is_available()) if(!quarkX1000_i2c_is_available()) {
return -1; return -1;
}
data->i2c_slave_addr = i2c_slave_addr; data->i2c_slave_addr = i2c_slave_addr;

22
platform/galileo/drivers/pwm-pca9685.c
View file

@ -47,21 +47,23 @@ pwm_pca9685_set_values(struct pwm_pca9685_data *data, uint32_t pwm, uint32_t on,
{ {
uint8_t buf[5] = { 0 }; uint8_t buf[5] = { 0 };
if (!quarkX1000_i2c_is_available()) if(!quarkX1000_i2c_is_available()) {
return -1; return -1;
}
if (pwm > MAX_PWM_OUT) if(pwm > MAX_PWM_OUT) {
return -1; return -1;
}
buf[0] = REG_LED_ON_L(pwm); buf[0] = REG_LED_ON_L(pwm);
if ((on >= PWM_ONE_PERIOD_TICKS) || (off >= PWM_ONE_PERIOD_TICKS)) { if((on >= PWM_ONE_PERIOD_TICKS) || (off >= PWM_ONE_PERIOD_TICKS)) {
/* Treat as 100% */ /* Treat as 100% */
buf[1] = 0x0; buf[1] = 0x0;
buf[2] = (1 << 4); buf[2] = (1 << 4);
buf[3] = 0x0; buf[3] = 0x0;
buf[4] = 0x0; buf[4] = 0x0;
} else if (off == 0) { } else if(off == 0) {
/* Treat it as 0% */ /* Treat it as 0% */
buf[1] = 0x0; buf[1] = 0x0;
buf[2] = 0x0; buf[2] = 0x0;
@ -77,16 +79,15 @@ pwm_pca9685_set_values(struct pwm_pca9685_data *data, uint32_t pwm, uint32_t on,
return quarkX1000_i2c_polling_write(buf, sizeof(buf), data->i2c_slave_addr); return quarkX1000_i2c_polling_write(buf, sizeof(buf), data->i2c_slave_addr);
} }
int int
pwm_pca9685_set_duty_cycle(struct pwm_pca9685_data *data, uint32_t pwm, uint8_t duty) pwm_pca9685_set_duty_cycle(struct pwm_pca9685_data *data, uint32_t pwm, uint8_t duty)
{ {
uint32_t on, off; uint32_t on, off;
if (duty == 0) { if(duty == 0) {
on = 0; on = 0;
off = 0; off = 0;
} else if (duty >= 100) { } else if(duty >= 100) {
on = PWM_ONE_PERIOD_TICKS + 1; on = PWM_ONE_PERIOD_TICKS + 1;
off = PWM_ONE_PERIOD_TICKS + 1; off = PWM_ONE_PERIOD_TICKS + 1;
} else { } else {
@ -96,23 +97,24 @@ pwm_pca9685_set_duty_cycle(struct pwm_pca9685_data *data, uint32_t pwm, uint8_t
return pwm_pca9685_set_values(data, pwm, on, off); return pwm_pca9685_set_values(data, pwm, on, off);
} }
int int
pwm_pca9685_init(struct pwm_pca9685_data *data, uint16_t i2c_slave_addr) pwm_pca9685_init(struct pwm_pca9685_data *data, uint16_t i2c_slave_addr)
{ {
uint8_t buf[2] = { 0 }; uint8_t buf[2] = { 0 };
/* has to init after I2C master */ /* has to init after I2C master */
if (!quarkX1000_i2c_is_available()) if(!quarkX1000_i2c_is_available()) {
return -1; return -1;
}
data->i2c_slave_addr = i2c_slave_addr; data->i2c_slave_addr = i2c_slave_addr;
buf[0] = REG_MODE1; buf[0] = REG_MODE1;
buf[1] = (1 << 5); buf[1] = (1 << 5);
if (quarkX1000_i2c_polling_write(buf, 2, i2c_slave_addr) < 0) if(quarkX1000_i2c_polling_write(buf, 2, i2c_slave_addr) < 0) {
return -1; return -1;
}
return 0; return 0;
} }