Improve UART power-cycling logic:
* Only enable TX by default. * Add some magic for RX handling. When an input handler is registered: * Automatically enable RX-related and interrupts * Automatically lock the SERIAL PD on under all power modes * Automatically enable the UART clock under sleep and deep sleep * Automatically undo all of the above when the input handler becomes NULL * As a result, modules / examples that need UART RX no longer need to clock the UART and manipulate the SERIAL PD. They simply have to specify an input handler * Don't automatically power on the UART whenever the CM3 is active * Before accessing the UART, make sure it is powered and clocked * Avoid falling edge glitches * Fix garbage characters / Explicitly wait for UART TX to complete
This commit is contained in:
George Oikonomou
parent
34f52ed08e
commit
07272b7cd6
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@ -40,6 +40,7 @@
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#include "sys/energest.h"
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#include <stdint.h>
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#include <stdbool.h>
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/*---------------------------------------------------------------------------*/
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/* Which events to trigger a UART interrupt */
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#define CC26XX_UART_RX_INTERRUPT_TRIGGERS (UART_INT_RX | UART_INT_RT)
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@ -53,35 +54,98 @@
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/*---------------------------------------------------------------------------*/
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static int (*input_handler)(unsigned char c);
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/*---------------------------------------------------------------------------*/
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static void
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power_domain_on(void)
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static bool
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usable(void)
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{
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if(BOARD_IOID_UART_RX == IOID_UNUSED ||
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BOARD_IOID_UART_TX == IOID_UNUSED ||
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CC26XX_UART_CONF_ENABLE == 0) {
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return false;
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}
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return true;
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}
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/*---------------------------------------------------------------------------*/
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static void
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power_and_clock(void)
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{
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/* Power on the SERIAL PD */
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ti_lib_prcm_power_domain_on(PRCM_DOMAIN_SERIAL);
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while(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
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!= PRCM_DOMAIN_POWER_ON);
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/* Enable UART clock in active mode */
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ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_UART0);
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get());
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}
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/*---------------------------------------------------------------------------*/
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/*
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* Returns 0 if either the SERIAL PD is off, or the PD is on but the run mode
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* clock is gated. If this function would return 0, accessing UART registers
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* will return a precise bus fault. If this function returns 1, it is safe to
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* access UART registers.
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*
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* This function only checks the 'run mode' clock gate, since it can only ever
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* be called with the MCU in run mode.
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*/
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static bool
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accessible(void)
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{
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/* First, check the PD */
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if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
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!= PRCM_DOMAIN_POWER_ON) {
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return false;
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}
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/* Then check the 'run mode' clock gate */
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if(!(HWREG(PRCM_BASE + PRCM_O_UARTCLKGR) & PRCM_UARTCLKGR_CLK_EN)) {
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return false;
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}
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return true;
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}
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/*---------------------------------------------------------------------------*/
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static void
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configure_baud_rate(void)
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disable_interrupts(void)
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{
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/* Acknowledge UART interrupts */
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ti_lib_int_disable(INT_UART0);
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/* Disable all UART module interrupts */
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ti_lib_uart_int_disable(UART0_BASE, CC26XX_UART_INTERRUPT_ALL);
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/* Clear all UART interrupts */
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ti_lib_uart_int_clear(UART0_BASE, CC26XX_UART_INTERRUPT_ALL);
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}
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/*---------------------------------------------------------------------------*/
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static void
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enable_interrupts(void)
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{
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/* Clear all UART interrupts */
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ti_lib_uart_int_clear(UART0_BASE, CC26XX_UART_INTERRUPT_ALL);
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/* Enable RX-related interrupts only if we have an input handler */
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if(input_handler) {
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/* Configure which interrupts to generate: FIFO level or after RX timeout */
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ti_lib_uart_int_enable(UART0_BASE, CC26XX_UART_RX_INTERRUPT_TRIGGERS);
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/* Acknowledge UART interrupts */
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ti_lib_int_enable(INT_UART0);
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}
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}
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/*---------------------------------------------------------------------------*/
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static void
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configure(void)
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{
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uint32_t ctl_val = UART_CTL_UARTEN | UART_CTL_TXE;
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/*
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* Configure the UART for 115,200, 8-N-1 operation.
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* This function uses SysCtrlClockGet() to get the system clock
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* frequency. This could be also be a variable or hard coded value
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* instead of a function call.
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* Make sure the TX pin is output / high before assigning it to UART control
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* to avoid falling edge glitches
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*/
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ti_lib_uart_config_set_exp_clk(UART0_BASE,
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ti_lib_sys_ctrl_peripheral_clock_get(
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PRCM_PERIPH_UART0,
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SYSCTRL_SYSBUS_ON),
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CC26XX_UART_CONF_BAUD_RATE,
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(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
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UART_CONFIG_PAR_NONE));
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}
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/*---------------------------------------------------------------------------*/
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static void
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configure_registers(void)
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{
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ti_lib_ioc_pin_type_gpio_output(BOARD_IOID_UART_TX);
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ti_lib_gpio_pin_write(BOARD_UART_TX, 1);
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/*
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* Map UART signals to the correct GPIO pins and configure them as
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* hardware controlled.
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@ -89,7 +153,14 @@ configure_registers(void)
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ti_lib_ioc_pin_type_uart(UART0_BASE, BOARD_IOID_UART_RX, BOARD_IOID_UART_TX,
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BOARD_IOID_UART_CTS, BOARD_IOID_UART_RTS);
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configure_baud_rate();
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/* Configure the UART for 115,200, 8-N-1 operation. */
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ti_lib_uart_config_set_exp_clk(UART0_BASE,
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ti_lib_sys_ctrl_peripheral_clock_get(
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PRCM_PERIPH_UART0,
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SYSCTRL_SYSBUS_ON),
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CC26XX_UART_CONF_BAUD_RATE,
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(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
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UART_CONFIG_PAR_NONE));
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/*
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* Generate an RX interrupt at FIFO 1/2 full.
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@ -97,116 +168,138 @@ configure_registers(void)
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*/
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ti_lib_uart_fifo_level_set(UART0_BASE, UART_FIFO_TX7_8, UART_FIFO_RX4_8);
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/* Configure which interrupts to generate: FIFO level or after RX timeout */
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ti_lib_uart_int_enable(UART0_BASE, CC26XX_UART_RX_INTERRUPT_TRIGGERS);
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}
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/*---------------------------------------------------------------------------*/
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static void
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uart_on(void)
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{
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power_domain_on();
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/* Enable FIFOs */
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HWREG(UART0_BASE + UART_O_LCRH) |= UART_LCRH_FEN;
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/* Configure baud rate and enable */
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if((HWREG(UART0_BASE + UART_O_CTL) & UART_CTL_UARTEN) == 0) {
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configure_registers();
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/* Enable UART */
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ti_lib_uart_enable(UART0_BASE);
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if(input_handler) {
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ctl_val += UART_CTL_RXE;
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}
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}
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/*---------------------------------------------------------------------------*/
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static uint8_t
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lpm_permit_max_pm_handler(void)
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{
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return LPM_MODE_MAX_SUPPORTED;
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/* Enable TX, RX (conditionally), and the UART. */
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HWREG(UART0_BASE + UART_O_CTL) = ctl_val;
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}
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/*---------------------------------------------------------------------------*/
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static void
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lpm_drop_handler(uint8_t mode)
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{
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/* Do nothing if the PD is off */
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if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
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!= PRCM_DOMAIN_POWER_ON) {
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return;
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/*
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* First, wait for any outstanding TX to complete. If we have an input
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* handler, the SERIAL PD will be kept on and the UART module clock will
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* be enabled under sleep as well as deep sleep. In theory, this means that
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* we shouldn't lose any outgoing bytes, but we actually do on occasion.
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* This byte loss may (or may not) be related to the freezing of IO latches
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* between MCU and AON when we drop to deep sleep. This here is essentially a
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* workaround
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*/
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if(accessible() == true) {
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while(ti_lib_uart_busy(UART0_BASE));
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}
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/* Wait for outstanding TX to complete */
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while(ti_lib_uart_busy(UART0_BASE));
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/*
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* Check our clock gate under Deep Sleep. If it's off, we can shut down. If
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* it's on, this means that some other code module wants UART functionality
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* during deep sleep, so we stay enabled
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* If we have a registered input_handler then we need to retain RX
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* capability. Thus, if this is not a shutdown notification and we have an
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* input handler, we do nothing
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*/
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if((HWREG(PRCM_BASE + PRCM_O_UARTCLKGDS) & 1) == 0) {
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ti_lib_ioc_pin_type_gpio_input(BOARD_IOID_UART_RX);
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ti_lib_ioc_pin_type_gpio_input(BOARD_IOID_UART_TX);
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ti_lib_uart_disable(UART0_BASE);
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}
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}
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/*---------------------------------------------------------------------------*/
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static void
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lpm_wakeup_handler(void)
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{
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uart_on();
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}
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/*---------------------------------------------------------------------------*/
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/* Declare a data structure to register with LPM. */
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LPM_MODULE(uart_module, lpm_permit_max_pm_handler,
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lpm_drop_handler, lpm_wakeup_handler);
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/*---------------------------------------------------------------------------*/
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void
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cc26xx_uart_init()
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{
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/* Exit without initialising if ports are misconfigured */
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if(BOARD_IOID_UART_RX == IOID_UNUSED ||
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BOARD_IOID_UART_TX == IOID_UNUSED) {
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if((mode != LPM_MODE_SHUTDOWN) && (input_handler != NULL)) {
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return;
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}
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/* Enable the serial domain and wait for domain to be on */
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power_domain_on();
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/*
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* If we reach here, we either don't care about staying awake or we have
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* received a shutdown notification
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*
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* Only touch UART registers if the module is powered and clocked
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*/
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if(accessible() == true) {
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/* Disable the module */
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ti_lib_uart_disable(UART0_BASE);
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/* Enable the UART clock when running and sleeping */
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ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_UART0);
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/* Disable all UART interrupts and clear all flags */
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disable_interrupts();
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}
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/* Apply clock settings and wait for them to take effect */
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/*
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* Always stop the clock in run mode. Also stop in Sleep and Deep Sleep if
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* this is a request for full shutdown
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*/
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ti_lib_prcm_peripheral_run_disable(PRCM_PERIPH_UART0);
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if(mode == LPM_MODE_SHUTDOWN) {
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ti_lib_prcm_peripheral_sleep_disable(PRCM_PERIPH_UART0);
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ti_lib_prcm_peripheral_deep_sleep_disable(PRCM_PERIPH_UART0);
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}
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get());
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/* Disable Interrupts */
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ti_lib_int_master_disable();
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/* Set pins to low leakage configuration in preparation for deep sleep */
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lpm_pin_set_default_state(BOARD_IOID_UART_TX);
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lpm_pin_set_default_state(BOARD_IOID_UART_RX);
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lpm_pin_set_default_state(BOARD_IOID_UART_CTS);
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lpm_pin_set_default_state(BOARD_IOID_UART_RTS);
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}
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/*---------------------------------------------------------------------------*/
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/* Declare a data structure to register with LPM. */
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LPM_MODULE(uart_module, NULL, lpm_drop_handler, NULL, LPM_DOMAIN_NONE);
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/*---------------------------------------------------------------------------*/
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static void
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enable(void)
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{
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power_and_clock();
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/* Make sure the peripheral is disabled */
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ti_lib_uart_disable(UART0_BASE);
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/* Disable all UART module interrupts */
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ti_lib_uart_int_disable(UART0_BASE, CC26XX_UART_INTERRUPT_ALL);
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/* Disable all UART interrupts and clear all flags */
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disable_interrupts();
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configure_registers();
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/* Setup pins, Baud rate and FIFO levels */
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configure();
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/* Acknowledge UART interrupts */
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ti_lib_int_enable(INT_UART0);
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/* Enable UART interrupts */
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enable_interrupts();
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}
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/*---------------------------------------------------------------------------*/
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void
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cc26xx_uart_init()
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{
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bool interrupts_disabled;
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/* Re-enable processor interrupts */
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ti_lib_int_master_enable();
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/* Return early if disabled by user conf or if ports are misconfigured */
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if(usable() == false) {
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return;
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}
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/* Enable UART */
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ti_lib_uart_enable(UART0_BASE);
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/* Disable Interrupts */
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interrupts_disabled = ti_lib_int_master_disable();
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/* Register ourselves with the LPM module */
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lpm_register_module(&uart_module);
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/* Only TX and EN to start with. RX will be enabled only if needed */
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input_handler = NULL;
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/*
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* init() won't actually fire up the UART. We turn it on only when (and if)
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* it gets requested, either to enable input or to send out a character
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*
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* Thus, we simply re-enable processor interrupts here
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*/
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if(!interrupts_disabled) {
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ti_lib_int_master_enable();
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}
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}
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/*---------------------------------------------------------------------------*/
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void
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cc26xx_uart_write_byte(uint8_t c)
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{
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if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_SERIAL)
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!= PRCM_DOMAIN_POWER_ON) {
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/* Return early if disabled by user conf or if ports are misconfigured */
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if(usable() == false) {
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return;
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}
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if(accessible() == false) {
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enable();
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}
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ti_lib_uart_char_put(UART0_BASE, c);
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}
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/*---------------------------------------------------------------------------*/
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@ -214,9 +307,52 @@ void
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cc26xx_uart_set_input(int (*input)(unsigned char c))
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{
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input_handler = input;
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/* Return early if disabled by user conf or if ports are misconfigured */
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if(usable() == false) {
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return;
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}
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if(input == NULL) {
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/* Let the SERIAL PD power down */
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uart_module.domain_lock = LPM_DOMAIN_NONE;
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/* Disable module clocks under sleep and deep sleep */
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ti_lib_prcm_peripheral_sleep_disable(PRCM_PERIPH_UART0);
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ti_lib_prcm_peripheral_deep_sleep_disable(PRCM_PERIPH_UART0);
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} else {
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/* Request the SERIAL PD to stay on during deep sleep */
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uart_module.domain_lock = LPM_DOMAIN_SERIAL;
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/* Enable module clocks under sleep and deep sleep */
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ti_lib_prcm_peripheral_sleep_enable(PRCM_PERIPH_UART0);
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ti_lib_prcm_peripheral_deep_sleep_enable(PRCM_PERIPH_UART0);
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}
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get());
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enable();
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return;
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}
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/*---------------------------------------------------------------------------*/
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uint8_t
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cc26xx_uart_busy(void)
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{
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/* Return early if disabled by user conf or if ports are misconfigured */
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if(usable() == false) {
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return UART_IDLE;
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}
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/* If the UART is not accessible, it is not busy */
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if(accessible() == false) {
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return UART_IDLE;
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}
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return ti_lib_uart_busy(UART0_BASE);
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}
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/*---------------------------------------------------------------------------*/
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void
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cc26xx_uart_isr(void)
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{
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@ -225,6 +361,8 @@ cc26xx_uart_isr(void)
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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power_and_clock();
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/* Read out the masked interrupt status */
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flags = ti_lib_uart_int_status(UART0_BASE, true);
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@ -63,9 +63,32 @@ void cc26xx_uart_write_byte(uint8_t b);
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/**
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* \brief Assigns a callback to be called when the UART receives a byte
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* \param input A pointer to the function
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*
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* If \e input is NULL, the UART driver will assume that RX functionality is
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* not required and it will be disabled. It will also disable the module's
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* clocks under sleep and deep sleep and allow the SERIAL PD to be powered off.
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*
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* If \e input is not NULL, the UART driver will assume that RX is in fact
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* required and it will be enabled. The module's clocks will be enabled under
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* sleep and deep sleep and the driver will not allow the SERIAL PD to turn
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* off during deep sleep, so that the UART can still receive bytes.
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*
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* \note This has a significant impact on overall energy consumption, so you
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* should only enabled UART RX input when it's actually required.
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*/
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void cc26xx_uart_set_input(int (*input)(unsigned char c));
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/**
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* \brief Returns the UART busy status
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* \return UART_IDLE or UART_BUSY
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*
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* ti_lib_uart_busy() will access UART registers. It is our responsibility
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* to first make sure the UART is accessible before calling it. Hence this
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* wrapper.
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*
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* Return values are defined in CC26xxware's uart.h
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*/
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uint8_t cc26xx_uart_busy(void);
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/** @} */
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/*---------------------------------------------------------------------------*/
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#endif /* CC26XX_UART_H_ */
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@ -29,6 +29,7 @@
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*/
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/*---------------------------------------------------------------------------*/
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#include "cc26xx-uart.h"
|
||||
#include "ti-lib.h"
|
||||
|
||||
#include <string.h>
|
||||
/*---------------------------------------------------------------------------*/
|
||||
|
|
@ -47,9 +48,16 @@ puts(const char *str)
|
|||
return 0;
|
||||
}
|
||||
for(i = 0; i < strlen(str); i++) {
|
||||
putchar(str[i]);
|
||||
cc26xx_uart_write_byte(str[i]);
|
||||
}
|
||||
putchar('\n');
|
||||
cc26xx_uart_write_byte('\n');
|
||||
|
||||
/*
|
||||
* Wait for the line to go out. This is to prevent garbage when used between
|
||||
* UART on/off cycles
|
||||
*/
|
||||
while(cc26xx_uart_busy() == UART_BUSY);
|
||||
|
||||
return i;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
|
|
@ -62,9 +70,16 @@ dbg_send_bytes(const unsigned char *s, unsigned int len)
|
|||
if(i >= len) {
|
||||
break;
|
||||
}
|
||||
putchar(*s++);
|
||||
cc26xx_uart_write_byte(*s++);
|
||||
i++;
|
||||
}
|
||||
|
||||
/*
|
||||
* Wait for the buffer to go out. This is to prevent garbage when used
|
||||
* between UART on/off cycles
|
||||
*/
|
||||
while(cc26xx_uart_busy() == UART_BUSY);
|
||||
|
||||
return i;
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
|
|
|
|||
Loading…
Reference in a new issue