CC2420: CC2420_WRITE_RAM with parameterizable ordering + resulting
simplifications
This commit is contained in:
parent
b89d37d301
commit
06d3225aa7
|
@ -44,20 +44,6 @@
|
||||||
|
|
||||||
#define KEYLEN 16
|
#define KEYLEN 16
|
||||||
#define MAX_DATALEN 16
|
#define MAX_DATALEN 16
|
||||||
|
|
||||||
#define CC2420_WRITE_RAM_REV(buffer,adr,count) \
|
|
||||||
do { \
|
|
||||||
uint8_t i; \
|
|
||||||
CC2420_SPI_ENABLE(); \
|
|
||||||
SPI_WRITE_FAST(0x80 | (adr & 0x7f)); \
|
|
||||||
SPI_WRITE_FAST((adr >> 1) & 0xc0); \
|
|
||||||
for(i = (count); i > 0; i--) { \
|
|
||||||
SPI_WRITE_FAST(((uint8_t*)(buffer))[i - 1]); \
|
|
||||||
} \
|
|
||||||
SPI_WAITFORTx_ENDED(); \
|
|
||||||
CC2420_SPI_DISABLE(); \
|
|
||||||
} while(0)
|
|
||||||
|
|
||||||
#define MIN(a,b) ((a) < (b)? (a): (b))
|
#define MIN(a,b) ((a) < (b)? (a): (b))
|
||||||
|
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
|
@ -66,10 +52,10 @@ cc2420_aes_set_key(const uint8_t *key, int index)
|
||||||
{
|
{
|
||||||
switch(index) {
|
switch(index) {
|
||||||
case 0:
|
case 0:
|
||||||
CC2420_WRITE_RAM_REV(key, CC2420RAM_KEY0, KEYLEN);
|
CC2420_WRITE_RAM(key, CC2420RAM_KEY0, KEYLEN, CC2420_WRITE_RAM_REVERSE);
|
||||||
break;
|
break;
|
||||||
case 1:
|
case 1:
|
||||||
CC2420_WRITE_RAM_REV(key, CC2420RAM_KEY1, KEYLEN);
|
CC2420_WRITE_RAM(key, CC2420RAM_KEY1, KEYLEN, CC2420_WRITE_RAM_REVERSE);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -82,7 +68,7 @@ cipher16(uint8_t *data, int len)
|
||||||
|
|
||||||
len = MIN(len, MAX_DATALEN);
|
len = MIN(len, MAX_DATALEN);
|
||||||
|
|
||||||
CC2420_WRITE_RAM(data, CC2420RAM_SABUF, len);
|
CC2420_WRITE_RAM(data, CC2420RAM_SABUF, len, CC2420_WRITE_RAM_IN_ORDER);
|
||||||
CC2420_STROBE(CC2420_SAES);
|
CC2420_STROBE(CC2420_SAES);
|
||||||
/* Wait for the encryption to finish */
|
/* Wait for the encryption to finish */
|
||||||
do {
|
do {
|
||||||
|
|
|
@ -300,9 +300,12 @@ read_ram(uint8_t *buffer, uint16_t adr, uint16_t count)
|
||||||
}
|
}
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
static void
|
static void
|
||||||
write_ram(uint8_t *buffer, uint16_t adr, uint16_t count)
|
write_ram(const uint8_t *buffer,
|
||||||
|
uint16_t adr,
|
||||||
|
uint16_t count,
|
||||||
|
enum cc2420_write_ram_order order)
|
||||||
{
|
{
|
||||||
CC2420_WRITE_RAM(buffer, adr, count);
|
CC2420_WRITE_RAM(buffer, adr, count, order);
|
||||||
}
|
}
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
static void
|
static void
|
||||||
|
@ -541,7 +544,7 @@ cc2420_transmit(unsigned short payload_len)
|
||||||
if(packetbuf_attr(PACKETBUF_ATTR_PACKET_TYPE) ==
|
if(packetbuf_attr(PACKETBUF_ATTR_PACKET_TYPE) ==
|
||||||
PACKETBUF_ATTR_PACKET_TYPE_TIMESTAMP) {
|
PACKETBUF_ATTR_PACKET_TYPE_TIMESTAMP) {
|
||||||
/* Write timestamp to last two bytes of packet in TXFIFO. */
|
/* Write timestamp to last two bytes of packet in TXFIFO. */
|
||||||
write_ram((uint8_t *) &sfd_timestamp, CC2420RAM_TXFIFO + payload_len - 1, 2);
|
write_ram((uint8_t *) &sfd_timestamp, CC2420RAM_TXFIFO + payload_len - 1, 2, CC2420_WRITE_RAM_IN_ORDER);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -719,9 +722,6 @@ cc2420_set_pan_addr(unsigned pan,
|
||||||
unsigned addr,
|
unsigned addr,
|
||||||
const uint8_t *ieee_addr)
|
const uint8_t *ieee_addr)
|
||||||
{
|
{
|
||||||
uint16_t f = 0;
|
|
||||||
uint8_t tmp[2];
|
|
||||||
|
|
||||||
GET_LOCK();
|
GET_LOCK();
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -729,20 +729,11 @@ cc2420_set_pan_addr(unsigned pan,
|
||||||
*/
|
*/
|
||||||
wait_for_status(BV(CC2420_XOSC16M_STABLE));
|
wait_for_status(BV(CC2420_XOSC16M_STABLE));
|
||||||
|
|
||||||
tmp[0] = pan & 0xff;
|
write_ram((uint8_t *) &pan, CC2420RAM_PANID, 2, CC2420_WRITE_RAM_IN_ORDER);
|
||||||
tmp[1] = pan >> 8;
|
write_ram((uint8_t *) &addr, CC2420RAM_SHORTADDR, 2, CC2420_WRITE_RAM_IN_ORDER);
|
||||||
write_ram((uint8_t *) &tmp, CC2420RAM_PANID, 2);
|
|
||||||
|
|
||||||
tmp[0] = addr & 0xff;
|
|
||||||
tmp[1] = addr >> 8;
|
|
||||||
write_ram((uint8_t *) &tmp, CC2420RAM_SHORTADDR, 2);
|
|
||||||
if(ieee_addr != NULL) {
|
if(ieee_addr != NULL) {
|
||||||
uint8_t tmp_addr[8];
|
write_ram(ieee_addr, CC2420RAM_IEEEADDR, 8, CC2420_WRITE_RAM_REVERSE);
|
||||||
/* LSB first, MSB last for 802.15.4 addresses in CC2420 */
|
|
||||||
for (f = 0; f < 8; f++) {
|
|
||||||
tmp_addr[7 - f] = ieee_addr[f];
|
|
||||||
}
|
|
||||||
write_ram(tmp_addr, CC2420RAM_IEEEADDR, 8);
|
|
||||||
}
|
}
|
||||||
RELEASE_LOCK();
|
RELEASE_LOCK();
|
||||||
}
|
}
|
||||||
|
|
|
@ -163,16 +163,29 @@ void cc2420_set_cca_threshold(int value);
|
||||||
CC2420_SPI_DISABLE(); \
|
CC2420_SPI_DISABLE(); \
|
||||||
} while(0)
|
} while(0)
|
||||||
|
|
||||||
|
enum cc2420_write_ram_order {
|
||||||
|
/* Begin with writing the first given byte */
|
||||||
|
CC2420_WRITE_RAM_IN_ORDER,
|
||||||
|
/* Begin with writing the last given byte */
|
||||||
|
CC2420_WRITE_RAM_REVERSE
|
||||||
|
};
|
||||||
|
|
||||||
/* Write to RAM in the CC2420 */
|
/* Write to RAM in the CC2420 */
|
||||||
#define CC2420_WRITE_RAM(buffer,adr,count) \
|
#define CC2420_WRITE_RAM(buffer,adr,count,order) \
|
||||||
do { \
|
do { \
|
||||||
uint8_t i; \
|
uint8_t i; \
|
||||||
CC2420_SPI_ENABLE(); \
|
CC2420_SPI_ENABLE(); \
|
||||||
SPI_WRITE_FAST(0x80 | ((adr) & 0x7f)); \
|
SPI_WRITE_FAST(0x80 | ((adr) & 0x7f)); \
|
||||||
SPI_WRITE_FAST(((adr) >> 1) & 0xc0); \
|
SPI_WRITE_FAST(((adr) >> 1) & 0xc0); \
|
||||||
|
if(order == CC2420_WRITE_RAM_IN_ORDER) { \
|
||||||
for(i = 0; i < (count); i++) { \
|
for(i = 0; i < (count); i++) { \
|
||||||
SPI_WRITE_FAST(((uint8_t*)(buffer))[i]); \
|
SPI_WRITE_FAST(((uint8_t*)(buffer))[i]); \
|
||||||
} \
|
} \
|
||||||
|
} else { \
|
||||||
|
for(i = (count); i > 0; i--) { \
|
||||||
|
SPI_WRITE_FAST(((uint8_t*)(buffer))[i - 1]); \
|
||||||
|
} \
|
||||||
|
} \
|
||||||
SPI_WAITFORTx_ENDED(); \
|
SPI_WAITFORTx_ENDED(); \
|
||||||
CC2420_SPI_DISABLE(); \
|
CC2420_SPI_DISABLE(); \
|
||||||
} while(0)
|
} while(0)
|
||||||
|
|
Loading…
Reference in a new issue