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Initial WiSMote port based on code from Arago Systems.

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This commit is contained in:
Niclas Finne 2011-09-21 20:02:04 +02:00
parent 367c82a5ab
commit 05b10eb9ce
45 changed files with 5641 additions and 23 deletions
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3
cpu/msp430/Makefile.msp430
View file

@ -82,12 +82,13 @@ ifdef WERROR
CFLAGSWERROR=-Werror
endif
CFLAGS += $(CFLAGSNO) -fno-strict-aliasing
CFLAGS += $(CFLAGSNO)
### These flags can reduce the code size and RAM usage with up to 10%
ifdef SMALL
CFLAGS += -ffunction-sections
# CFLAGS += -fdata-sections
LDFLAGS += -Wl,--gc-sections,--undefined=_reset_vector__,--undefined=InterruptVectors,--undefined=_copy_data_init__,--undefined=_clear_bss_init__,--undefined=_end_of_init__
endif # SMALL

80
cpu/msp430/cc2520-arch-sfd.c Normal file
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@ -0,0 +1,80 @@
/*
* Copyright (c) 2011, Swedish Institute of Computer Science
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include "contiki.h"
#include "dev/spi.h"
#include "dev/cc2520.h"
extern volatile uint8_t cc2520_sfd_counter;
extern volatile uint16_t cc2520_sfd_start_time;
extern volatile uint16_t cc2520_sfd_end_time;
/*---------------------------------------------------------------------------*/
/* SFD interrupt for timestamping radio packets */
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=TIMERB1_VECTOR
__interrupt void
#else
interrupt(TIMERB1_VECTOR)
#endif
cc2520_timerb1_interrupt(void)
{
int tbiv;
ENERGEST_ON(ENERGEST_TYPE_IRQ);
/* always read TBIV to clear IFG */
tbiv = TBIV;
if(CC2520_SFD_IS_1) {
cc2520_sfd_counter++;
cc2520_sfd_start_time = TBCCR1;
} else {
cc2520_sfd_counter = 0;
cc2520_sfd_end_time = TBCCR1;
}
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
/*---------------------------------------------------------------------------*/
void
cc2520_arch_sfd_init(void)
{
/* Need to select the special function! */
P4SEL = BV(CC2520_SFD_PIN);
/* start timer B - 32768 ticks per second */
TBCTL = TBSSEL_1 | TBCLR;
/* CM_3 = capture mode - capture on both edges */
TBCCTL1 = CM_3 | CAP | SCS;
TBCCTL1 |= CCIE;
/* Start Timer_B in continuous mode. */
TBCTL |= MC1;
TBR = RTIMER_NOW();
}
/*---------------------------------------------------------------------------*/

38
cpu/msp430/cc2520-arch-sfd.h Normal file
View file

@ -0,0 +1,38 @@
/*
* Copyright (c) 2011, Swedish Institute of Computer Science
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#ifndef CC2520_ARCH_SFD_H
#define CC2520_ARCH_SFD_H
extern volatile uint8_t cc2520_arch_sfd_counter;
extern volatile uint16_t cc2520_arch_sfd_start_time;
extern volatile uint16_t cc2520_arch_sfd_end_time;
void cc2520_arch_sfd_init(void);
#endif /* CC2520_ARCH_SFD_H */

85
cpu/msp430/cc2520-arch.c Normal file
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@ -0,0 +1,85 @@
/*
* Copyright (c) 2011, Swedish Institute of Computer Science
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include "contiki.h"
#include "contiki-net.h"
#include "dev/spi.h"
#include "dev/cc2520.h"
#ifdef CC2520_CONF_SFD_TIMESTAMPS
#define CONF_SFD_TIMESTAMPS CC2520_CONF_SFD_TIMESTAMPS
#endif /* CC2520_CONF_SFD_TIMESTAMPS */
#ifndef CONF_SFD_TIMESTAMPS
#define CONF_SFD_TIMESTAMPS 0
#endif /* CONF_SFD_TIMESTAMPS */
#ifdef CONF_SFD_TIMESTAMPS
#include "cc2520-arch-sfd.h"
#endif
/*---------------------------------------------------------------------------*/
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=CC2520_IRQ_VECTOR
__interrupt void
#else
interrupt(CC2520_IRQ_VECTOR)
#endif
cc2520_port1_interrupt(void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
if(cc2520_interrupt()) {
LPM4_EXIT;
}
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
/*---------------------------------------------------------------------------*/
void
cc2520_arch_init(void)
{
spi_init();
/* all input by default, set these as output */
CC2520_CSN_PORT(DIR) |= BV(CC2520_CSN_PIN);
CC2520_VREG_PORT(DIR) |= BV(CC2520_VREG_PIN);
CC2520_RESET_PORT(DIR) |= BV(CC2520_RESET_PIN);
P1DIR &= ~(BV(CC2520_FIFOP_PIN) | BV(CC2520_FIFO_PIN) | BV(CC2520_CCA_PIN));
P2DIR &= ~(BV(CC2520_SFD_PIN));
#if CONF_SFD_TIMESTAMPS
cc2520_arch_sfd_init();
#endif
CC2520_SPI_DISABLE(); /* Unselect radio. */
}
/*---------------------------------------------------------------------------*/

109
cpu/msp430/clock.c
View file

@ -37,7 +37,7 @@
#include "sys/clock.h"
#include "sys/etimer.h"
#include "rtimer-arch.h"
#include "watchdog.h"
#include "dev/watchdog.h"
#define INTERVAL (RTIMER_ARCH_SECOND / CLOCK_SECOND)
@ -49,13 +49,68 @@ static volatile clock_time_t count = 0;
/* last_tar is used for calculating clock_fine */
static volatile uint16_t last_tar = 0;
/*---------------------------------------------------------------------------*/
#if CONTIKI_TARGET_WISMOTE
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=TIMER1_A1_VECTOR
__interrupt void
#else
interrupt(TIMER1_A1_VECTOR)
#endif
timera1 (void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
watchdog_start();
if(TA1IV == 2) { //CCR1
// HW timer bug fix: Interrupt handler called before TR==CCR.
// Occurrs when timer state is toggled between STOP and CONT.
while(TA1CTL & MC1 && TA1CCR1 - TA1R == 1);
// Make sure interrupt time is futures
do {
TA1CCR1 += INTERVAL;
++count;
/* Make sure the CLOCK_CONF_SECOND is a power of two, to ensure
that the modulo operation below becomes a logical and and not
an expensive divide. Algorithm from Wikipedia:
http://en.wikipedia.org/wiki/Power_of_two */
#if (CLOCK_CONF_SECOND & (CLOCK_CONF_SECOND - 1)) != 0
#error CLOCK_CONF_SECOND must be a power of two (i.e., 1, 2, 4, 8, 16, 32, 64, ...).
#error Change CLOCK_CONF_SECOND in contiki-conf.h.
#endif
if(count % CLOCK_CONF_SECOND == 0) {
++seconds;
energest_flush();
}
} while((TA1CCR1 - TA1R) > INTERVAL);
last_tar = TA1R;
if(etimer_pending() &&
(etimer_next_expiration_time() - count - 1) > MAX_TICKS) {
etimer_request_poll();
LPM4_EXIT;
}
}
/*if(process_nevents() >= 0) {
LPM4_EXIT;
}*/
watchdog_stop();
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
#else
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=TIMERA1_VECTOR
__interrupt void
#else
interrupt(TIMERA1_VECTOR)
#endif
timera1 (void) {
timera1 (void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
watchdog_start();
@ -102,6 +157,7 @@ timera1 (void) {
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
#endif
/*---------------------------------------------------------------------------*/
clock_time_t
clock_time(void)
@ -117,8 +173,13 @@ clock_time(void)
void
clock_set(clock_time_t clock, clock_time_t fclock)
{
#if CONTIKI_TARGET_WISMOTE
TA1R = fclock;
TA1CCR1 = fclock + INTERVAL;
#else
TAR = fclock;
TACCR1 = fclock + INTERVAL;
#endif
count = clock;
}
/*---------------------------------------------------------------------------*/
@ -135,22 +196,58 @@ clock_fine(void)
/* Assign last_tar to local varible that can not be changed by interrupt */
t = last_tar;
/* perform calc based on t, TAR will not be changed during interrupt */
#if CONTIKI_TARGET_WISMOTE
return (unsigned short) (TA1R - t);
#else
return (unsigned short) (TAR - t);
#endif
}
/*---------------------------------------------------------------------------*/
void
clock_init(void)
{
dint();
#if CONTIKI_TARGET_WISMOTE
/* Select SMCLK (2.4576MHz), clear TAR */
//TA1CTL = TASSEL1 | TACLR | ID_3;
/* Select ACLK clock, divide*/
/* TA1CTL = TASSEL0 | TACLR | ID_1; */
#if INTERVAL==32768/CLOCK_SECOND
TA1CTL = TASSEL0 | TACLR;
#elif INTERVAL==16384/CLOCK_SECOND
TA1CTL = TASSEL0 | TACLR | ID_1;
#else
#error NEED TO UPDATE clock.c to match interval!
#endif
/* Initialize ccr1 to create the X ms interval. */
/* CCR1 interrupt enabled, interrupt occurs when timer equals CCR1. */
TA1CCTL1 = CCIE;
/* Interrupt after X ms. */
TA1CCR1 = INTERVAL;
/* Start Timer_A in continuous mode. */
TA1CTL |= MC1;
#else
/* Select SMCLK (2.4576MHz), clear TAR */
/* TACTL = TASSEL1 | TACLR | ID_3; */
/* Select ACLK 32768Hz clock, divide by 2 */
/* TACTL = TASSEL0 | TACLR | ID_1;*/
/* Select ACLK 32768Hz clock */
/* TACTL = TASSEL0 | TACLR; */
#if INTERVAL==32768/CLOCK_SECOND
TACTL = TASSEL0 | TACLR;
#elif INTERVAL==16384/CLOCK_SECOND
TACTL = TASSEL0 | TACLR | ID_1;
#else
#error NEED TO UPDATE clock.c to match interval!
#endif
/* Initialize ccr1 to create the X ms interval. */
/* CCR1 interrupt enabled, interrupt occurs when timer equals CCR1. */
@ -161,7 +258,7 @@ clock_init(void)
/* Start Timer_A in continuous mode. */
TACTL |= MC1;
#endif
count = 0;
/* Enable interrupts. */
@ -221,6 +318,10 @@ clock_seconds(void)
rtimer_clock_t
clock_counter(void)
{
#if CONTIKI_TARGET_WISMOTE
return TA1R;
#else
return TAR;
#endif
}
/*---------------------------------------------------------------------------*/

91
cpu/msp430/dev/uart1.c
View file

@ -33,7 +33,6 @@
* Machine dependent MSP430 UART1 code.
*/
#include <stdlib.h>
#include "contiki.h"
#include "sys/energest.h"
#include "dev/uart1.h"
@ -93,7 +92,11 @@ handle_rxdma_timer(void *ptr)
uint8_t
uart1_active(void)
{
#if CONTIKI_TARGET_WISMOTE
return rx_in_progress | transmitting;
#else
return ((~ UTCTL1) & TXEPT) | rx_in_progress | transmitting;
#endif
}
/*---------------------------------------------------------------------------*/
void
@ -123,16 +126,21 @@ uart1_writeb(unsigned char c)
/* Loop until the transmission buffer is available. */
/*while((IFG2 & UTXIFG1) == 0);*/
TXBUF1 = ringbuf_get(&txbuf);
UCA1TXBUF = ringbuf_get(&txbuf);
}
#else /* TX_WITH_INTERRUPT */
#if CONTIKI_TARGET_WISMOTE
while(!(UCA1IFG & UCTXIFG)); // USCI_A1 TX buffer ready?
UCA1TXBUF = c;
#else
/* Loop until the transmission buffer is available. */
while((IFG2 & UTXIFG1) == 0);
/* Transmit the data. */
TXBUF1 = c;
#endif
#endif /* TX_WITH_INTERRUPT */
}
/*---------------------------------------------------------------------------*/
@ -143,6 +151,35 @@ uart1_writeb(unsigned char c)
void
uart1_init(unsigned long ubr)
{
#if CONTIKI_TARGET_WISMOTE
P4DIR |= BIT5;
P4OUT |= BIT5 ;
P5SEL |= BIT6|BIT7; // P5.6,7 = USCI_A1 TXD/RXD
P4SEL |= BIT7;
P4DIR |= BIT7;
UCA1CTL1 |= UCSWRST; // **Put state machine in reset**
UCA1CTL1 |= UCSSEL_2; // SMCLK
UCA1BR0 = 139;//69; // Baudrate 57600 (see User's Guide)
UCA1BR1 = 0; //
UCA1MCTL |= UCBRS_2 + UCBRF_0; // Modulation UCBRFx=0
UCA1CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
UCA1IE |= UCRXIE;
UCA1IFG &= ~UCRXIFG;
//UCA1IFG &= ~UCTXIFG;
// UCA1TCTL1 |= URXSE;
rx_in_progress = 0;
transmitting = 0;
#if TX_WITH_INTERRUPT
ringbuf_init(&txbuf, txbuf_data, sizeof(txbuf_data));
UCA1IE |= UCTXIE;
//UCA1IFG &= ~UCTXIFG;
#endif /* TX_WITH_INTERRUPT */
#else
/* RS232 */
P3DIR &= ~0x80; /* Select P37 for input (UART1RX) */
P3DIR |= 0x40; /* Select P36 for output (UART1TX) */
@ -151,7 +188,7 @@ uart1_init(unsigned long ubr)
UCTL1 = SWRST | CHAR; /* 8-bit character, UART mode */
#if 0
U1RCTL &= ~URXEIE; /* even erroneous characters trigger interrupts */
U1RCTL &= ~URXEIE; /* even erroneous characters trigger interrupts */
#endif
UTCTL1 = SSEL1; /* UCLK = MCLK */
@ -235,10 +272,52 @@ uart1_init(unsigned long ubr)
msp430_add_lpm_req(MSP430_REQUIRE_LPM1);
#endif /* RX_WITH_DMA */
#endif
}
/*---------------------------------------------------------------------------*/
#if CONTIKI_TARGET_WISMOTE
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=USCI_A1_VECTOR
__interrupt void
#else
interrupt(USCI_A1_VECTOR)
#endif
uart1_rx_interrupt(void)
{
uint8_t c;
ENERGEST_ON(ENERGEST_TYPE_IRQ);
if(UCRXIFG & UCA1IFG) {
rx_in_progress = 0;
// Check status register for receive errors.
if(UCA1STAT & UCRXERR) {
c = UCA1RXBUF; // Clear error flags by forcing a dummy read.
} else {
c = UCA1RXBUF;
if(uart1_input_handler != NULL) {
if(uart1_input_handler(c)) {
LPM4_EXIT;
}
}
}
UCA1IFG &= ~UCRXIFG;
}
#if TX_WITH_INTERRUPT
if(UCTXIFG & UCA1IFG) {
if(ringbuf_elements(&txbuf) == 0) {
transmitting = 0;
} else {
UCA1TXBUF = ringbuf_get(&txbuf);
}
UCA1IFG &= ~UCTXIFG;
}
#endif
//UCA1IFG &= 0x00;
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
#else
#if !RX_WITH_DMA
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=UART1RX_VECTOR
@ -277,7 +356,12 @@ uart1_rx_interrupt(void)
#endif /* !RX_WITH_DMA */
/*---------------------------------------------------------------------------*/
#if TX_WITH_INTERRUPT
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=UART1TX_VECTOR
__interrupt void
#else
interrupt(UART1TX_VECTOR)
#endif
uart1_tx_interrupt(void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
@ -291,4 +375,5 @@ uart1_tx_interrupt(void)
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
#endif /* TX_WITH_INTERRUPT */
#endif
/*---------------------------------------------------------------------------*/

33
cpu/msp430/msp430.c
View file

@ -27,12 +27,9 @@
* SUCH DAMAGE.
*
* This file is part of the Contiki operating system.
*
* @(#)$Id: msp430.c,v 1.15 2011/01/05 13:36:38 joxe Exp $
*/
#include "contiki.h"
#include "dev/watchdog.h"
#include "net/uip.h"
/* dco_required set to 1 will cause the CPU not to go into
sleep modes where the DCO clock stopped */
@ -69,13 +66,34 @@ w_memset(void *out, int value, size_t n)
void
msp430_init_dco(void)
{
/* This code taken from the FU Berlin sources and reformatted. */
#if CONTIKI_TARGET_WISMOTE
// Stop watchdog
WDTCTL = WDTPW + WDTHOLD;
/** Configure XTAL **/
P7SEL |= BIT0 + BIT1; // Activate XT1
UCSCTL6 &= ~XT1OFF; // Set XT1 On
UCSCTL6 |= XT1DRIVE_2 | XTS | XT2OFF; // Max drive strength, adjust
UCSCTL6 &= ~XT1DRIVE_1;
do {
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG);
// Clear XT2,XT1,DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear fault flags
}while (SFRIFG1&OFIFG); // Test oscillator fault flag
UCSCTL2 = FLLD0 + FLLD2;
UCSCTL5 |= DIVA__2 + DIVS__2+ DIVM__2;//DIVPA__32 + DIVA__32 + DIVS__2+ DIVM__2;
UCSCTL4 = SELA__DCOCLKDIV + SELS__XT1CLK + SELM__XT1CLK; // Set MCLCK = XT1/2 , SMCLK = XT1/2 , ACLK = XT1/2
#else
/* This code taken from the FU Berlin sources and reformatted. */
#define DELTA ((MSP430_CPU_SPEED) / (32768 / 8))
unsigned int compare, oldcapture = 0;
unsigned int i;
BCSCTL1 = 0xa4; /* ACLK is devided by 4. RSEL=6 no division for MCLK
and SSMCLK. XT2 is off. */
@ -119,6 +137,8 @@ msp430_init_dco(void)
TACTL = 0; /* Stop Timer_A */
BCSCTL1 &= ~(DIVA1 + DIVA0); /* remove /8 divisor from ACLK again */
#endif
}
/*---------------------------------------------------------------------------*/
@ -234,6 +254,7 @@ msp430_cpu_init(void)
* runtime.
*/
#if defined(__MSP430__) && defined(__GNUC__)
#define asmv(arg) __asm__ __volatile__(arg)
void *
sbrk(int incr)
{
@ -286,6 +307,7 @@ splhigh_(void)
/* #endif */
/* } */
/*---------------------------------------------------------------------------*/
#if DCOSYNCH_CONF_ENABLED
/* this code will always start the TimerB if not already started */
void
msp430_sync_dco(void) {
@ -332,4 +354,5 @@ msp430_sync_dco(void) {
}
}
}
#endif /* DCOSYNCH_CONF_ENABLED */
/*---------------------------------------------------------------------------*/

1
cpu/msp430/msp430def.h
View file

@ -38,7 +38,6 @@
#include <msp430.h>
#define dint() __disable_interrupt()
#define eint() __enable_interrupt()
#define __MSP430F1611__ 1
#define __MSP430__ 1
#define CC_CONF_INLINE
#define BV(x) (1 << x)

46
cpu/msp430/rtimer-arch.c
View file

@ -39,7 +39,6 @@
*/
#include "contiki.h"
#include "sys/energest.h"
#include "sys/rtimer.h"
#include "sys/process.h"
@ -54,13 +53,15 @@
#endif
/*---------------------------------------------------------------------------*/
#if CONTIKI_TARGET_WISMOTE
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=TIMERA0_VECTOR
#pragma vector=TIMER1_A0_VECTOR
__interrupt void
#else
interrupt(TIMERA0_VECTOR)
interrupt(TIMER1_A0_VECTOR)
#endif
timera0 (void) {
timera0 (void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
watchdog_start();
@ -75,6 +76,30 @@ timera0 (void) {
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
#else
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=TIMER1_A0_VECTOR
__interrupt void
#else
interrupt(TIMERA0_VECTOR)
#endif
timera0 (void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
watchdog_start();
rtimer_run_next();
if(process_nevents() > 0) {
LPM4_EXIT;
}
watchdog_stop();
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
#endif
/*---------------------------------------------------------------------------*/
void
rtimer_arch_init(void)
@ -82,7 +107,11 @@ rtimer_arch_init(void)
dint();
/* CCR0 interrupt enabled, interrupt occurs when timer equals CCR0. */
#if CONTIKI_TARGET_WISMOTE
TA1CCTL0 = CCIE;
#else
TACCTL0 = CCIE;
#endif
/* Enable interrupts. */
eint();
@ -93,8 +122,13 @@ rtimer_arch_now(void)
{
rtimer_clock_t t1, t2;
do {
#if CONTIKI_TARGET_WISMOTE
t1 = TA1R;
t2 = TA1R;
#else
t1 = TAR;
t2 = TAR;
#endif
} while(t1 != t2);
return t1;
}
@ -104,6 +138,10 @@ rtimer_arch_schedule(rtimer_clock_t t)
{
PRINTF("rtimer_arch_schedule time %u\n", t);
#if CONTIKI_TARGET_WISMOTE
TA1CCR0 = t;
#else
TACCR0 = t;
#endif
}
/*---------------------------------------------------------------------------*/

6
cpu/msp430/watchdog.c
View file

@ -112,9 +112,13 @@ watchdog_init(void)
initialization. */
counter = 0;
watchdog_stop();
#if CONTIKI_TARGET_WISMOTE
SFRIFG1 &= ~WDTIFG;
SFRIE1 |= WDTIE;
#else
IFG1 &= ~WDTIFG;
IE1 |= WDTIE;
#endif
}
/*---------------------------------------------------------------------------*/
void