This commit is contained in:
Mariano Alvira 2012-10-10 17:57:26 -04:00
parent 6ff896d5b2
commit 009180e0a9
8 changed files with 122 additions and 12 deletions

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@ -1,6 +1,6 @@
# -*- makefile -*- # -*- makefile -*-
ALL_BOARDS = redbee-dev redbee-r1 redbee-usb redbee-econotag quahogcon freescale-ncb ALL_BOARDS = redbee-dev redbee-r1 redbee-usb redbee-econotag quahogcon freescale-ncb m12
OBJDIR = obj_$(BOARD) OBJDIR = obj_$(BOARD)
CFLAGS += -I. -I$(OBJDIR) -I$(MC1322X)/board -DBOARD=$(BOARD) CFLAGS += -I. -I$(OBJDIR) -I$(MC1322X)/board -DBOARD=$(BOARD)

54
board/m12.h Normal file
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@ -0,0 +1,54 @@
/*
* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
* to the MC1322x project (http://mc1322x.devl.org)
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is part of libmc1322x: see http://mc1322x.devl.org
* for details.
*
*
*/
#ifndef BOARD_M12_H
#define BOARD_M12_H
/* XTAL TUNE parameters */
/* see http://devl.org/pipermail/mc1322x/2009-December/000162.html */
/* for details about how to make this measurement */
/* Econotag also needs an addtional 12pf on board */
/* Coarse tune: add 4pf */
#define CTUNE_4PF 1
/* Coarse tune: add 0-15 pf (CTUNE is 4 bits) */
#define CTUNE 3
/* Fine tune: add FTUNE * 156fF (FTUNE is 5bits) */
#define FTUNE 3
#define vreg_init buck_init
#include <std_conf.h>
#endif

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@ -42,6 +42,28 @@
#define vreg_init() default_vreg_init() #define vreg_init() default_vreg_init()
#endif #endif
#ifndef GPIO_LED_RED
#define GPIO_LED_RED GPIO_40
#endif
#ifndef GPIO_LED_GREEN
#define GPIO_LED_GREEN GPIO_41
#endif
#ifndef GPIO_LED_BLUE
#define GPIO_LED_BLUE GPIO_42
#endif
#ifndef LED_RED
#define LED_RED 40
#endif
#ifndef LED_GREEN
#define LED_GREEN 41
#endif
#ifndef LED_BLUE
#define LED_BLUE 42
#endif
/* XTAL TUNE parameters */ /* XTAL TUNE parameters */
/* recommended defaults from the datasheet */ /* recommended defaults from the datasheet */

18
doc/buck Normal file
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@ -0,0 +1,18 @@
no buck
-------
vsupply,
3.6, rftest-rx 46mA
3.27, rftest-rx 42mA
3.03, rftest-rx, 39.5mA
2.56, rftest-rx 35mA
2.2, rftest-rx 32mA
buck
-----
3.58V, 39mA
3.3, 37mA
vsupply 3.03, rftest, 35.3mA
2.47, 32.9mA
2.2V, 31.2mA
might have a hard time starting up everything in the <2.7V range

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@ -870,8 +870,10 @@ void radio_init(void) {
volatile uint32_t i; volatile uint32_t i;
/* sequence 1 */ /* sequence 1 */
for(i=0; i<MAX_SEQ1; i++) { for(i=0; i<MAX_SEQ1; i++) {
if((unsigned int)addr_seq1[i] != (unsigned int)CRM_VREG_CNTL) {
*(volatile uint32_t *)(addr_seq1[i]) = data_seq1[i]; *(volatile uint32_t *)(addr_seq1[i]) = data_seq1[i];
} }
}
/* seq 1 delay */ /* seq 1 delay */
for(i=0; i<0x161a8; i++) { continue; } for(i=0; i<0x161a8; i++) { continue; }
/* sequence 2 */ /* sequence 2 */
@ -898,8 +900,10 @@ void radio_init(void) {
} }
/* cal 5 */ /* cal 5 */
for(i=0; i<MAX_CAL5; i++) { for(i=0; i<MAX_CAL5; i++) {
if((unsigned int)addr_cal5[i] != (unsigned int)CRM_VREG_CNTL) {
*(volatile uint32_t *)(addr_cal5[i]) = data_cal5[i]; *(volatile uint32_t *)(addr_cal5[i]) = data_cal5[i];
} }
}
/*reg replacment */ /*reg replacment */
for(i=0; i<MAX_DATA; i++) { for(i=0; i<MAX_DATA; i++) {
*(volatile uint32_t *)(addr_reg_rep[i]) = data_reg_rep[i]; *(volatile uint32_t *)(addr_reg_rep[i]) = data_reg_rep[i];
@ -907,12 +911,6 @@ void radio_init(void) {
PRINTF("initfromflash\n\r"); PRINTF("initfromflash\n\r");
*(volatile uint32_t *)(0x80003048) = 0x00000f04; /* bypass the buck */
for(i=0; i<0x161a8; i++) { continue; } /* wait for the bypass to take */
// while((((*(volatile uint32_t *)(0x80003018))>>17) & 1) !=1) { continue; } /* wait for the bypass to take */
*(volatile uint32_t *)(0x80003048) = 0x00000fa4; /* start the regulators */
for(i=0; i<0x161a8; i++) { continue; } /* wait for the bypass to take */
init_from_flash(0x1F000); init_from_flash(0x1F000);
PRINTF("ram_values:\n\r"); PRINTF("ram_values:\n\r");
@ -1141,7 +1139,11 @@ uint32_t exec_init_entry(volatile uint32_t *entries, uint8_t *valbuf)
PRINTF("init_entry: address value pair - *0x%08x = 0x%08x\n\r", PRINTF("init_entry: address value pair - *0x%08x = 0x%08x\n\r",
(unsigned int)entries[0], (unsigned int)entries[0],
(unsigned int)entries[1]); (unsigned int)entries[1]);
if ((unsigned int)entries[0] != (unsigned int)CRM_VREG_CNTL) {
reg(entries[0]) = entries[1]; reg(entries[0]) = entries[1];
} else {
PRINTF("skipping VREG_CNTL\n\r");
}
return 2; return 2;
} }
} }

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@ -45,6 +45,19 @@ void default_vreg_init(void) {
*CRM_VREG_CNTL = 0x00000ff8; /* start the regulators */ *CRM_VREG_CNTL = 0x00000ff8; /* start the regulators */
} }
void buck_init(void) {
CRM->SYS_CNTLbits.PWR_SOURCE = 1;
CRM->VREG_CNTLbits.BUCK_SYNC_REC_EN = 1;
CRM->VREG_CNTLbits.BUCK_BYPASS_EN = 0;
CRM->VREG_CNTLbits.BUCK_EN = 1;
while(CRM->STATUSbits.VREG_BUCK_RDY == 0) { continue; }
CRM->VREG_CNTLbits.VREG_1P5V_SEL = 3;
CRM->VREG_CNTLbits.VREG_1P5V_EN = 3;
CRM->VREG_CNTLbits.VREG_1P8V_EN = 1;
while(CRM->STATUSbits.VREG_1P5V_RDY == 0) { continue; }
while(CRM->STATUSbits.VREG_1P8V_RDY == 0) { continue; }
}
void uart1_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) { void uart1_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) {
/* UART must be disabled to set the baudrate */ /* UART must be disabled to set the baudrate */

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@ -41,6 +41,7 @@
#define trim_xtal() pack_XTAL_CNTL(CTUNE_4PF, CTUNE, FTUNE, IBIAS) #define trim_xtal() pack_XTAL_CNTL(CTUNE_4PF, CTUNE, FTUNE, IBIAS)
void default_vreg_init(void); void default_vreg_init(void);
void buck_init(void);
void uart1_init(uint16_t inc, uint16_t mod, uint8_t samp); void uart1_init(uint16_t inc, uint16_t mod, uint8_t samp);
void uart2_init(uint16_t inc, uint16_t mod, uint8_t samp); void uart2_init(uint16_t inc, uint16_t mod, uint8_t samp);