general header updates
This commit is contained in:
Mariano Alvira
parent
0678e778b1
commit
0037fd9527
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@ -46,8 +46,8 @@
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#define ROSC_FTUNE 4 /* 4 bits */
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#define ROSC_EN 0
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#define ring_osc_on() (set_bit(reg32(CRM_RINGOSC_CNTL),ROSC_EN))
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#define ring_osc_off() (clear_bit(reg32(CRM_RINGOSC_CNTL),ROSC_EN))
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#define ring_osc_on() (set_bit(*CRM_RINGOSC_CNTL,ROSC_EN))
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#define ring_osc_off() (clear_bit(*CRM_RINGOSC_CNTL,ROSC_EN))
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#define REF_OSC 24000000ULL /* reference osc. frequency */
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#define NOMINAL_RING_OSC_SEC 2000 /* nominal ring osc. frequency */
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@ -57,34 +57,34 @@
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#define XTAL32_GAIN 4 /* 2 bits */
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#define XTAL32_EN 0
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#define xtal32_on() (set_bit(reg32(CRM_XTAL32_CNTL),XTAL32_EN))
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#define xtal32_off() (clear_bit(reg32(CRM_XTAL32_CNTL),XTAL32_EN))
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#define xtal32_exists() (set_bit(reg32(CRM_SYS_CNTL),XTAL32_EXISTS))
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#define xtal32_on() (set_bit(*CRM_XTAL32_CNTL,XTAL32_EN))
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#define xtal32_off() (clear_bit(*CRM_XTAL32_CNTL,XTAL32_EN))
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#define xtal32_exists() (set_bit(*CRM_SYS_CNTL,XTAL32_EXISTS))
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/* enable external wake-ups on kbi 4-7 */
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/* see kbi.h for other kbi specific macros */
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#define enable_ext_wu(kbi) (set_bit(reg32(CRM_WU_CNTL),(EXT_WU_EN+kbi-4)))
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#define disable_ext_wu(kbi) (clear_bit(reg32(CRM_WU_CNTL),(EXT_WU_EN+kbi-4)))
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#define enable_ext_wu(kbi) (set_bit(*CRM_WU_CNTL,(EXT_WU_EN+kbi-4)))
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#define disable_ext_wu(kbi) (clear_bit(*CRM_WU_CNTL,(EXT_WU_EN+kbi-4)))
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#define is_ext_wu_evt(kbi) (bit_is_set(reg32(CRM_STATUS),(EXT_WU_EVT+kbi-4)))
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#define clear_ext_wu_evt(kbi) (set_bit(reg32(CRM_STATUS),(EXT_WU_EVT+kbi-4))) /* r1wc bit */
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#define is_ext_wu_evt(kbi) (bit_is_set(*CRM_STATUS,(EXT_WU_EVT+kbi-4)))
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#define clear_ext_wu_evt(kbi) (set_bit(*CRM_STATUS,(EXT_WU_EVT+kbi-4))) /* r1wc bit */
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/* enable wake-up timer */
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#define enable_timer_wu_irq() ((set_bit(reg32(CRM_WU_CNTL),(TIMER_WU_IEN))))
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#define disable_timer_wu_irq() ((clear_bit(reg32(CRM_WU_CNTL),(TIMER_WU_IEN))))
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#define enable_timer_wu_irq() ((set_bit(*CRM_WU_CNTL,(TIMER_WU_IEN))))
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#define disable_timer_wu_irq() ((clear_bit(*CRM_WU_CNTL,(TIMER_WU_IEN))))
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#define enable_timer_wu() ((set_bit(reg32(CRM_WU_CNTL),(TIMER_WU_EN))))
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#define disable_timer_wu() ((clear_bit(reg32(CRM_WU_CNTL),(TIMER_WU_EN))))
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#define enable_timer_wu() ((set_bit(*CRM_WU_CNTL,(TIMER_WU_EN))))
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#define disable_timer_wu() ((clear_bit(*CRM_WU_CNTL,(TIMER_WU_EN))))
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/* enable wake-up from RTC compare */
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#define enable_rtc_wu_irq() (set_bit(reg32(CRM_WU_CNTL),RTC_WU_IEN))
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#define disable_rtc_wu_irq() (clear_bit(reg32(CRM_WU_CNTL),RTC_WU_IEN))
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#define enable_rtc_wu_irq() (set_bit(*CRM_WU_CNTL,RTC_WU_IEN))
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#define disable_rtc_wu_irq() (clear_bit(*CRM_WU_CNTL,RTC_WU_IEN))
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#define enable_rtc_wu() ((set_bit(reg32(CRM_WU_CNTL),(RTC_WU_EN))))
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#define disable_rtc_wu() ((clear_bit(reg32(CRM_WU_CNTL),(RTC_WU_EN))))
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#define enable_rtc_wu() ((set_bit(*CRM_WU_CNTL,(RTC_WU_EN))))
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#define disable_rtc_wu() ((clear_bit(*CRM_WU_CNTL,(RTC_WU_EN))))
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#define clear_rtc_wu_evt() (set_bit(reg32(CRM_STATUS),RTC_WU_EVT))
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#define rtc_wu_evt() (bit_is_set(reg32(CRM_STATUS),RTC_WU_EVT))
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#define clear_rtc_wu_evt() (set_bit(*CRM_STATUS,RTC_WU_EVT))
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#define rtc_wu_evt() (bit_is_set(*CRM_STATUS,RTC_WU_EVT))
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#define SLEEP_MODE_HIBERNATE bit(0)
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#define SLEEP_MODE_DOZE bit(1)
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@ -2,17 +2,56 @@
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#define ISR_H
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#define INTBASE (0x80020000)
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#define INTCNTL_OFF (0x0)
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#define INTENNUM_OFF (0x8)
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#define INTDISNUM_OFF (0xc)
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#define INTDISNUM_OFF (0xC)
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#define INTENABLE_OFF (0x10)
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#define INTSRC_OFF (0x30)
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#define NIPEND_OFF (0x38)
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#define INTENNUM INTBASE + INTENNUM_OFF
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#define INTDISNUM INTBASE + INTDISNUM_OFF
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#define INTSRC INTBASE + INTSRC_OFF
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#define INTCNTL ((volatile uint32_t *) (INTBASE + INTCNTL_OFF))
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#define INTENNUM ((volatile uint32_t *) (INTBASE + INTENNUM_OFF))
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#define INTDISNUM ((volatile uint32_t *) (INTBASE + INTDISNUM_OFF))
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#define INTENABLE ((volatile uint32_t *) (INTBASE + INTENABLE_OFF))
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#define INTSRC ((volatile uint32_t *) (INTBASE + INTSRC_OFF))
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#define NIPEND ((volatile uint32_t *) (INTBASE + NIPEND_OFF))
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#define enable_tmr_irq() *(volatile uint32_t *)(INTENNUM) = 5;
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enum interrupt_nums {
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INT_NUM_ASM = 0,
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INT_NUM_UART1,
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INT_NUM_UART2,
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INT_NUM_CRM,
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INT_NUM_I2C,
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INT_NUM_TMR,
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INT_NUM_SPIF,
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INT_NUM_MACA,
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INT_NUM_SSI,
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INT_NUM_ADC,
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INT_NUM_SPI,
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};
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#define global_irq_disable() (set_bit(*INTCNTL,20))
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#define global_irq_enable() (clear_bit(*INTCNTL,20))
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#define enable_irq(irq) (*INTENNUM = INT_NUM_##irq)
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#define disable_irq(irq) (*INTDISNUM = INT_NUM_##irq)
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extern void tmr0_isr(void) __attribute__((weak));
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extern void tmr1_isr(void) __attribute__((weak));
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extern void tmr2_isr(void) __attribute__((weak));
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extern void tmr3_isr(void) __attribute__((weak));
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extern void rtc_isr(void) __attribute__((weak));
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extern void kbi4_isr(void) __attribute__((weak));
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extern void kbi5_isr(void) __attribute__((weak));
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extern void kbi6_isr(void) __attribute__((weak));
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extern void kbi7_isr(void) __attribute__((weak));
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extern void uart1_isr(void) __attribute__((weak));
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extern void maca_isr(void) __attribute__((weak));
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extern void tmr_isr(void) __attribute__((weak));
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#endif
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19
lib/include/kbi.h
Normal file
19
lib/include/kbi.h
Normal file
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@ -0,0 +1,19 @@
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#ifndef KBI_H
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#define KBI_H
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#define enable_irq_kbi(k) (set_bit(*CRM_WU_CNTL,(EXT_WU_IEN+k-4)))
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#define disable_irq_kbi(k) (clear_bit(*CRM_WU_CNTL,(EXT_WU_IEN+k-4)))
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#define kbi_evnt(k) (bit_is_set(*CRM_STATUS,(EXT_WU_EVT+k-4)))
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#define kbi_edge(k) (set_bit(*CRM_WU_CNTL,(EXT_WU_EDGE+k-4)))
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#define kbi_level(k) (clear_bit(*CRM_WU_CNTL,(EXT_WU_EDGE+k-4)))
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#define kbi_pol_neg(k) (clear_bit(*CRM_WU_CNTL,(EXT_WU_POL+k-4)))
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#define kbi_pol_pos(k) (set_bit(*CRM_WU_CNTL,(EXT_WU_POL+k-4)))
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/* you have to clear these events by writing a one to them */
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#define clear_kbi_evnt(k) (set_bit(*CRM_STATUS,(EXT_WU_EVT+k-4)))
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#endif
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@ -7,10 +7,10 @@
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#include "crm.h"
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#include "nvm.h"
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#include "tmr.h"
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#include "kbi.h"
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#include "maca.h"
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#include "packet.h"
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#include "uart1.h"
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#include "utils.h"
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#include "put.h" /* this is a temp. lib */
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#endif
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