117 lines
6.1 KiB
C
117 lines
6.1 KiB
C
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#include "uart0.h"
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#include <iodefine.h>
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#include <iodefine_ext.h>
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void uart0_init(void)
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{
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/* Reference R01AN0459EJ0100 or hardware manual for details */
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PIOR.pior = 0U; /* Disable IO redirection */
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PM1.pm1 |= 0x06U; /* Set P11 and P12 as inputs */
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SAU0EN = 1; /* Supply clock to serial array unit 0 */
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SPS0.sps0 = 0x44U; /* Set input clock (CK00 and CK01) to fclk/16 = 2MHz */
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ST0.st0 = 0x03U; /* Stop operation of channel 0 and 1 */
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/* Setup interrupts (disable) */
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STMK0 = 1; /* Disable INTST0 interrupt */
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STIF0 = 0; /* Clear INTST0 interrupt request flag */
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STPR10 = 1; /* Set INTST0 priority: lowest */
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STPR00 = 1;
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SRMK0 = 1; /* Disable INTSR0 interrupt */
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SRIF0 = 0; /* Clear INTSR0 interrupt request flag */
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SRPR10 = 1; /* Set INTSR0 priority: lowest */
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SRPR00 = 1;
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SREMK0 = 1; /* Disable INTSRE0 interrupt */
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SREIF0 = 0; /* Clear INTSRE0 interrupt request flag */
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SREPR10 = 1; /* Set INTSRE0 priority: lowest */
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SREPR00 = 1;
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/* Setup operation mode for transmitter (channel 0) */
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SMR00.smr00 = 0x0023U; /* Operation clock : CK00,
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Transfer clock : division of CK00
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Start trigger : software
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Detect falling edge as start bit
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Operation mode : UART
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Interrupt source : buffer empty
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*/
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SCR00.scr00 = 0x8097U; /* Transmission only
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Reception error interrupt masked
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Phase clock : type 1
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No parity
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LSB first
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1 stop bit
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8-bit data length
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*/
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SDR00.sdr00 = 0xCE00U; /* transfer clock : operation clock divided by 208
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2 MHz / 208 = ~9600 bps
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*/
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/* Setup operation mode for receiver (channel 1) */
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NFEN0.nfen0 |= 1; /* Enable noise filter on RxD0 pin */
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SIR01.sir01 = 0x0007U; /* Clear error flags */
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SMR01.smr01 = 0x0122U; /* Operation clock : CK00
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Transfer clock : division of CK00
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Start trigger : valid edge on RxD pin
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Detect falling edge as start bit
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Operation mode : UART
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Interrupt source : transfer end
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*/
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SCR01.scr01 = 0x4097U; /* Reception only
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Reception error interrupt masked
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Phase clock : type 1
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No parity
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LSB first
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1 stop bit
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8-bit data length
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*/
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SDR01.sdr01 = 0xCE00U; /* transfer clock : operation clock divided by 208
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2 MHz / 208 = ~9600 bps
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*/
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SO0.so0 |= 1; /* Prepare for use of channel 0 */
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SOE0.soe0 |= 1;
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P1.p1 |= (1 << 2); /* Set TxD0 high */
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PM1.pm1 &= ~(1 << 2); /* Set output mode for TxD0 */
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PM1.pm1 |= (1 << 1); /* Set input mode for RxD0 */
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SS0.ss0 |= 0x03U; /* Enable UART0 operation (both channels) */
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STIF0 = 1; /* Set buffer empty interrupt request flag */
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}
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int uart0_puts(const char * s)
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{
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int len = 0;
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SMR00.smr00 |= 0x0001U; /* Set buffer empty interrupt */
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while ('\0' != *s)
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{
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while (0 == STIF0);
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STIF0 = 0;
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SDR00.sdr00 = *s++;
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++len;
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}
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#if 0
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while (0 == STIF0);
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STIF0 = 0;
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SDR00.sdr00 = '\r';
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#endif
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while (0 == STIF0);
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STIF0 = 0;
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SMR00.smr00 &= ~0x0001U;
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SDR00.sdr00 = '\n';
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while (0 == STIF0);
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#if 0
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while (0 != SSR00.BIT.bit6); /* Wait until TSF00 == 0 */
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#endif
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return len;
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}
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__attribute__((interrupt))
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void st0_handler(void)
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{
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}
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__attribute__((interrupt))
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void sr0_handler(void)
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{
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}
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/* This is actually INTSRE0 interrupt handler */
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__attribute__((interrupt))
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void tm01h_handler(void)
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{
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}
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