2006-06-18 00:41:10 +02:00
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/*
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2008-07-01 23:02:51 +02:00
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* Copyright (c) 2007, Swedish Institute of Computer Science.
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2006-06-18 00:41:10 +02:00
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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*/
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2008-07-01 23:02:51 +02:00
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/**
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* \file
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* CC2420 driver header file
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* \author
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* Adam Dunkels <adam@sics.se>
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2010-06-23 12:15:28 +02:00
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* Joakim Eriksson <joakime@sics.se>
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2008-07-01 23:02:51 +02:00
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*/
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2006-06-18 00:41:10 +02:00
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2013-11-24 16:57:08 +01:00
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#ifndef CC2420_H_
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#define CC2420_H_
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2006-06-18 00:41:10 +02:00
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2008-07-01 23:02:51 +02:00
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#include "contiki.h"
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2010-06-24 11:28:38 +02:00
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#include "dev/spi.h"
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2008-07-01 23:02:51 +02:00
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#include "dev/radio.h"
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2013-11-28 14:04:34 +01:00
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#include "cc2420_const.h"
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2006-06-18 00:41:10 +02:00
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A work-in-progress rework of the Contiki MAC and radio layers. The
main ideas are:
* Separates the Contiki low-layer network stack into four layers:
network (e.g. sicslowpan / rime), Medium Access Control MAC
(e.g. CSMA), Radio Duty Cycling RDC (e.g. ContikiMAC, X-MAC), and
radio (e.g. cc2420).
* Introduces a new way to configure the network stack. Four #defines
that specify what mechanism/protocol/driver to use at the four
layers: NETSTACK_CONF_NETWORK, NETSTACK_CONF_MAC, NETSTACK_CONF_RDC,
NETSTACK_CONF_RADIO.
* Adds a callback mechanism to inform the MAC and network layers about
the fate of a transmitted packet: if the packet was not possible to
transmit, the cause of the failure is reported, and if the packets
was successfully transmitted, the number of tries before it was
finally transmitted is reported.
* NULL-protocols at both the MAC and RDC layers: nullmac and nullrdc,
which can be used when MAC and RDC functionality is not needed.
* Extends the radio API with three new functions that enable more
efficient radio duty cycling protocols: channel check, pending
packet, and receiving packet.
* New initialization mechanism, which takes advantage of the NETSTACK
#defines.
2010-02-18 22:48:39 +01:00
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int cc2420_init(void);
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2006-06-18 00:41:10 +02:00
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2008-07-02 11:05:40 +02:00
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#define CC2420_MAX_PACKET_LEN 127
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2006-08-02 16:33:36 +02:00
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2010-09-23 10:26:06 +02:00
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int cc2420_set_channel(int channel);
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2008-07-02 11:05:40 +02:00
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int cc2420_get_channel(void);
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2006-08-02 16:33:36 +02:00
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2008-07-02 11:05:40 +02:00
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void cc2420_set_pan_addr(unsigned pan,
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2010-06-23 12:15:28 +02:00
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unsigned addr,
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const uint8_t *ieee_addr);
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2006-06-18 00:41:10 +02:00
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2008-07-02 11:05:40 +02:00
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extern signed char cc2420_last_rssi;
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extern uint8_t cc2420_last_correlation;
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2006-06-18 00:41:10 +02:00
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2008-07-02 11:05:40 +02:00
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int cc2420_rssi(void);
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2006-06-18 00:41:10 +02:00
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2008-07-02 11:05:40 +02:00
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extern const struct radio_driver cc2420_driver;
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2006-06-18 00:41:10 +02:00
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2008-07-01 23:02:51 +02:00
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/**
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* \param power Between 1 and 31.
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*/
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2008-07-02 11:05:40 +02:00
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void cc2420_set_txpower(uint8_t power);
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int cc2420_get_txpower(void);
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#define CC2420_TXPOWER_MAX 31
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#define CC2420_TXPOWER_MIN 0
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2006-06-18 00:41:10 +02:00
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2008-07-01 23:02:51 +02:00
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/**
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* Interrupt function, called from the simple-cc2420-arch driver.
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*
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*/
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2008-07-02 11:05:40 +02:00
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int cc2420_interrupt(void);
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2006-06-18 00:41:10 +02:00
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2008-07-01 23:02:51 +02:00
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/* XXX hack: these will be made as Chameleon packet attributes */
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2008-07-02 11:05:40 +02:00
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extern rtimer_clock_t cc2420_time_of_arrival,
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cc2420_time_of_departure;
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extern int cc2420_authority_level_of_sender;
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2006-06-18 00:41:10 +02:00
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2008-07-02 11:05:40 +02:00
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int cc2420_on(void);
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int cc2420_off(void);
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2006-06-18 00:41:10 +02:00
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2010-02-23 19:24:49 +01:00
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void cc2420_set_cca_threshold(int value);
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2010-06-23 12:15:28 +02:00
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/************************************************************************/
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/* Additional SPI Macros for the CC2420 */
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/************************************************************************/
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/* Send a strobe to the CC2420 */
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2010-06-24 11:28:38 +02:00
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#define CC2420_STROBE(s) \
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2010-06-23 12:15:28 +02:00
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do { \
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CC2420_SPI_ENABLE(); \
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SPI_WRITE(s); \
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CC2420_SPI_DISABLE(); \
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} while (0)
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/* Write to a register in the CC2420 */
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/* Note: the SPI_WRITE(0) seems to be needed for getting the */
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/* write reg working on the Z1 / MSP430X platform */
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2010-06-24 11:28:38 +02:00
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#define CC2420_WRITE_REG(adr,data) \
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2010-06-23 12:15:28 +02:00
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do { \
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CC2420_SPI_ENABLE(); \
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SPI_WRITE_FAST(adr); \
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SPI_WRITE_FAST((uint8_t)((data) >> 8)); \
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SPI_WRITE_FAST((uint8_t)(data & 0xff)); \
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SPI_WAITFORTx_ENDED(); \
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SPI_WRITE(0); \
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CC2420_SPI_DISABLE(); \
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} while(0)
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/* Read a register in the CC2420 */
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2010-06-24 11:28:38 +02:00
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#define CC2420_READ_REG(adr,data) \
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2010-06-23 12:15:28 +02:00
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do { \
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CC2420_SPI_ENABLE(); \
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SPI_WRITE(adr | 0x40); \
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data = (uint8_t)SPI_RXBUF; \
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SPI_TXBUF = 0; \
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SPI_WAITFOREORx(); \
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data = SPI_RXBUF << 8; \
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SPI_TXBUF = 0; \
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SPI_WAITFOREORx(); \
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data |= SPI_RXBUF; \
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CC2420_SPI_DISABLE(); \
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} while(0)
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2010-06-24 11:28:38 +02:00
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#define CC2420_READ_FIFO_BYTE(data) \
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2010-06-23 12:15:28 +02:00
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do { \
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CC2420_SPI_ENABLE(); \
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SPI_WRITE(CC2420_RXFIFO | 0x40); \
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(void)SPI_RXBUF; \
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2013-05-24 12:13:47 +02:00
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SPI_READ(*data); \
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2010-06-23 12:15:28 +02:00
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clock_delay(1); \
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CC2420_SPI_DISABLE(); \
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} while(0)
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2010-06-24 11:28:38 +02:00
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#define CC2420_READ_FIFO_BUF(buffer,count) \
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2010-06-23 12:15:28 +02:00
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do { \
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uint8_t i; \
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CC2420_SPI_ENABLE(); \
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SPI_WRITE(CC2420_RXFIFO | 0x40); \
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(void)SPI_RXBUF; \
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for(i = 0; i < (count); i++) { \
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SPI_READ(((uint8_t *)(buffer))[i]); \
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} \
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clock_delay(1); \
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CC2420_SPI_DISABLE(); \
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} while(0)
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2010-06-24 11:28:38 +02:00
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#define CC2420_WRITE_FIFO_BUF(buffer,count) \
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2010-06-23 12:15:28 +02:00
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do { \
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uint8_t i; \
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CC2420_SPI_ENABLE(); \
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SPI_WRITE_FAST(CC2420_TXFIFO); \
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for(i = 0; i < (count); i++) { \
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SPI_WRITE_FAST(((uint8_t *)(buffer))[i]); \
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} \
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SPI_WAITFORTx_ENDED(); \
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CC2420_SPI_DISABLE(); \
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} while(0)
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2013-05-25 13:53:41 +02:00
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enum cc2420_write_ram_order {
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/* Begin with writing the first given byte */
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CC2420_WRITE_RAM_IN_ORDER,
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/* Begin with writing the last given byte */
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CC2420_WRITE_RAM_REVERSE
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};
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2010-06-23 12:15:28 +02:00
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/* Write to RAM in the CC2420 */
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2013-05-25 13:53:41 +02:00
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#define CC2420_WRITE_RAM(buffer,adr,count,order) \
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2010-06-23 12:15:28 +02:00
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do { \
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uint8_t i; \
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CC2420_SPI_ENABLE(); \
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2010-12-16 23:39:50 +01:00
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SPI_WRITE_FAST(0x80 | ((adr) & 0x7f)); \
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SPI_WRITE_FAST(((adr) >> 1) & 0xc0); \
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2013-05-25 13:53:41 +02:00
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if(order == CC2420_WRITE_RAM_IN_ORDER) { \
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for(i = 0; i < (count); i++) { \
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SPI_WRITE_FAST(((uint8_t*)(buffer))[i]); \
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} \
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} else { \
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for(i = (count); i > 0; i--) { \
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SPI_WRITE_FAST(((uint8_t*)(buffer))[i - 1]); \
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} \
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2010-06-23 12:15:28 +02:00
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} \
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SPI_WAITFORTx_ENDED(); \
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CC2420_SPI_DISABLE(); \
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} while(0)
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2010-06-24 13:25:07 +02:00
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/* Read from RAM in the CC2420 */
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#define CC2420_READ_RAM(buffer,adr,count) \
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do { \
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uint8_t i; \
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CC2420_SPI_ENABLE(); \
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2010-12-16 23:39:50 +01:00
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SPI_WRITE(0x80 | ((adr) & 0x7f)); \
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SPI_WRITE((((adr) >> 1) & 0xc0) | 0x20); \
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2010-06-24 13:25:07 +02:00
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SPI_RXBUF; \
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for(i = 0; i < (count); i++) { \
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SPI_READ(((uint8_t*)(buffer))[i]); \
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} \
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CC2420_SPI_DISABLE(); \
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} while(0)
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2010-06-23 12:15:28 +02:00
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/* Read status of the CC2420 */
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2010-06-24 11:28:38 +02:00
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#define CC2420_GET_STATUS(s) \
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2010-06-23 12:15:28 +02:00
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do { \
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CC2420_SPI_ENABLE(); \
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SPI_WRITE(CC2420_SNOP); \
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s = SPI_RXBUF; \
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CC2420_SPI_DISABLE(); \
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} while (0)
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2013-11-24 16:57:08 +01:00
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#endif /* CC2420_H_ */
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