1185 lines
31 KiB
C
1185 lines
31 KiB
C
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#include <usb-arch.h>
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#include <gpio.h>
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#include <nvic.h>
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#include <stdio.h>
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#include <debug-uart.h>
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#include <usb-stm32f103.h>
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/* #define DEBUG */
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#ifdef DEBUG
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#define PRINTF(...) printf(__VA_ARGS__)
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#else
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#define PRINTF(...)
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#endif
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typedef struct
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{
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vu32 EPR[8];
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u32 RESERVED[8];
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vu32 CNTR;
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vu32 ISTR;
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vu32 FNR;
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vu32 DADDR;
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vu32 BTABLE;
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} USB_TypeDef;
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#define USB_BASE (APB1PERIPH_BASE + 0x5c00)
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#define USB_MEM_BASE (APB1PERIPH_BASE + 0x6000)
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#define USB_MEM_SIZE (512)
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#define USB ((volatile USB_TypeDef *) USB_BASE)
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typedef struct {
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vu32 ADDR_TX;
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vu32 COUNT_TX;
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vu32 ADDR_RX;
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vu32 COUNT_RX;
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} USB_HW_Buffer;
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#define USB_EP0_BUF_SIZE (2*CTRL_EP_SIZE)
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#define USB_EP1_BUF_SIZE (2*USB_EP1_SIZE)
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#define USB_EP2_BUF_SIZE (2*USB_EP2_SIZE)
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#define USB_EP3_BUF_SIZE (2*USB_EP3_SIZE)
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#define USB_EP4_BUF_SIZE (2*USB_EP4_SIZE)
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#define USB_EP5_BUF_SIZE (2*USB_EP5_SIZE)
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#define USB_EP6_BUF_SIZE (2*USB_EP6_SIZE)
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#define USB_EP7_BUF_SIZE (2*USB_EP7_SIZE)
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#ifndef MAX_CTRL_DATA
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#define MAX_CTRL_DATA 128
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#endif
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/* Double buffered IN endpoint */
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#define ADDR_TX_0 ADDR_TX
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#define ADDR_TX_1 ADDR_RX
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#define COUNT_TX_0 COUNT_TX
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#define COUNT_TX_1 COUNT_RX
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/* Double buffered OUT endpoint */
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#define ADDR_RX_0 ADDR_TX
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#define ADDR_RX_1 ADDR_RX
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#define COUNT_RX_0 COUNT_TX
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#define COUNT_RX_1 COUNT_RX
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#define USB_EPxR_EP_TYPE_BULK 0
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#define USB_EPxR_EP_TYPE_CONTROL USB_EP0R_EP_TYPE_0
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#define USB_EPxR_EP_TYPE_ISO USB_EP0R_EP_TYPE_1
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#define USB_EPxR_EP_TYPE_INTERRUPT (USB_EP0R_EP_TYPE_1|USB_EP0R_EP_TYPE_0)
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#define USB_EPxR_EP_DBL_BUF USB_EP0R_EP_KIND
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#define USB_EPxR_EP_STATUS_OUT USB_EP0R_EP_KIND
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#define USB_EPxR_STAT_RX_DISABLED 0
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#define USB_EPxR_STAT_RX_STALL USB_EP0R_STAT_RX_0
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#define USB_EPxR_STAT_RX_NAK USB_EP0R_STAT_RX_1
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#define USB_EPxR_STAT_RX_VALID (USB_EP0R_STAT_RX_1|USB_EP0R_STAT_RX_0)
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#define USB_EPxR_STAT_TX_DISABLED 0
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#define USB_EPxR_STAT_TX_STALL USB_EP0R_STAT_TX_0
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#define USB_EPxR_STAT_TX_NAK USB_EP0R_STAT_TX_1
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#define USB_EPxR_STAT_TX_VALID (USB_EP0R_STAT_TX_1|USB_EP0R_STAT_TX_0)
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#define USB_EPxR_SW_BUF_TX USB_EP0R_DTOG_RX
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#define USB_EPxR_SW_BUF_RX USB_EP0R_DTOG_TX
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static const uint16_t ep_buffer_size[8] =
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{
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USB_EP0_BUF_SIZE,
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USB_EP1_BUF_SIZE,
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USB_EP2_BUF_SIZE,
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USB_EP3_BUF_SIZE,
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USB_EP4_BUF_SIZE,
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USB_EP5_BUF_SIZE,
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USB_EP6_BUF_SIZE,
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USB_EP7_BUF_SIZE
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};
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#define USB_EP_BUF_SIZE(ep) ep_buffer_size[ep]
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#define USB_EP_BUF_OFFSET(ep) ep_buffer_offset[ep]
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#define USB_EP_BUF_ADDR(ep) (u32*)(USB_MEM_BASE + ep_buffer_offset[ep]*2);
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#define USB_EP_BUF_DESC(ep) ((USB_HW_Buffer*)(USB_MEM_BASE + 16 * (ep)))
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#define USB_EP0_OFFSET (8*USB_MAX_ENDPOINTS)
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#define USB_EP1_OFFSET (USB_EP0_OFFSET + USB_EP0_BUF_SIZE)
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#define USB_EP2_OFFSET (USB_EP1_OFFSET + USB_EP1_BUF_SIZE)
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#define USB_EP3_OFFSET (USB_EP2_OFFSET + USB_EP2_BUF_SIZE)
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#define USB_EP4_OFFSET (USB_EP3_OFFSET + USB_EP3_BUF_SIZE)
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#define USB_EP5_OFFSET (USB_EP4_OFFSET + USB_EP4_BUF_SIZE)
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#define USB_EP6_OFFSET (USB_EP5_OFFSET + USB_EP5_BUF_SIZE)
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#define USB_EP7_OFFSET (USB_EP6_OFFSET + USB_EP6_BUF_SIZE)
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#if (USB_EP7_OFFSET+USB_EP7_BUF_SIZE) > USB_MEM_SIZE
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#error USB endpoints buffers does not fit in USB memory
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#endif
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static const uint16_t ep_buffer_offset[8] =
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{
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USB_EP0_OFFSET,
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USB_EP1_OFFSET,
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USB_EP2_OFFSET,
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USB_EP3_OFFSET,
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USB_EP4_OFFSET,
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USB_EP5_OFFSET,
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USB_EP6_OFFSET,
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USB_EP7_OFFSET
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};
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#define USB_EP_BUF_CAPACITY(s) ((((s) <64)?((s)/2):(0x20 | ((s)/64)))<<10)
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typedef struct _USBEndpoint USBEndpoint;
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struct _USBEndpoint
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{
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uint16_t status;
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uint8_t addr;
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uint8_t flags;
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USBBuffer *buffer; /* NULL if no current buffer */
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struct process *event_process;
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uint16_t events;
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uint16_t xfer_size;
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};
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#define USB_EP_FLAGS_TYPE_MASK 0x03
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#define USB_EP_FLAGS_TYPE_BULK 0x00
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#define USB_EP_FLAGS_TYPE_CONTROL 0x01
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#define USB_EP_FLAGS_TYPE_ISO 0x02
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#define USB_EP_FLAGS_TYPE_INTERRUPT 0x03
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#define IS_EP_TYPE(ep, type) (((ep)->flags & USB_EP_FLAGS_TYPE_MASK) == (type))
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#define IS_CONTROL_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_CONTROL)
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#define IS_BULK_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_BULK)
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#define IS_INTERRUPT_EP(ep) IS_EP_TYPE(ep, USB_EP_FLAGS_TYPE_INTERRUPT)
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#define USB_EP_FLAGS_ENABLED 0x04
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/* A packet has been received but the data is still in hardware buffer */
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#define USB_EP_FLAGS_RECV_PENDING 0x08
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/* The pending packet is a SETUP packet */
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#define USB_EP_FLAGS_SETUP_PENDING 0x10
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/* The data in the hardware buffer is being transmitted */
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#define USB_EP_FLAGS_TRANSMITTING 0x20
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/* The receiver is waiting for a packet */
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#define USB_EP_FLAGS_RECEIVING 0x40
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/* For bulk endpoints. Both buffers are busy are in use, either by
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hardware or software. */
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#define USB_EP_FLAGS_DOUBLE 0x80
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/* States for double buffered reception:
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Packets being received 0 1 2 1 0 0
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Packets pending 0 0 0 1 2 1
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RECVING 0 1 1 1 0 0
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RECV_PENDING 0 0 0 1 1 1
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DOUBLE 0 0 1 0 1 0
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*/
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/* States for double buffered transmission:
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Packets being transmitted 0 1 2
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TRANSMITTING 0 1 1
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DOUBLE 0 0 1
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*/
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/* Index in endpoint array */
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#define EP_INDEX(addr) ((addr) & 0x7f)
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/* Get address of endpoint struct */
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#define EP_STRUCT(addr) (&usb_endpoints[EP_INDEX(addr)])
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/* Number of hardware endpoint */
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#define EP_HW_NUM(addr) ((addr) & 0x7f)
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#define USB_DISABLE_INT \
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NVIC_DISABLE_INT(USB_LP_CAN_RX0_IRQChannel);\
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NVIC_DISABLE_INT(USB_HP_CAN_TX_IRQChannel)
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#define USB_ENABLE_INT \
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NVIC_ENABLE_INT(USB_LP_CAN_RX0_IRQChannel);\
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NVIC_ENABLE_INT(USB_HP_CAN_TX_IRQChannel)
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static inline uint32_t
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usb_save_disable_int()
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{
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uint32_t v = NVIC->ISER[0];
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NVIC->ICER[0] = (1<<USB_HP_CAN_TX_IRQChannel | 1<<USB_LP_CAN_RX0_IRQChannel);
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return v;
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}
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static inline void
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usb_restore_int(uint32_t v)
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{
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NVIC->ISER[0] =
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v & (1<<USB_HP_CAN_TX_IRQChannel | 1<<USB_LP_CAN_RX0_IRQChannel);
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}
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static USBEndpoint usb_endpoints[USB_MAX_ENDPOINTS];
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struct process *event_process = 0;
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volatile unsigned int events = 0;
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static void
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notify_process(unsigned int e)
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{
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events |= e;
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if (event_process) {
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process_poll(event_process);
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}
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}
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static void
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notify_ep_process(USBEndpoint *ep, unsigned int e)
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{
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ep->events |= e;
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if (ep->event_process) {
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process_poll(ep->event_process);
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}
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}
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static void
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usb_arch_reset(void)
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{
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unsigned int e;
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for (e = 0; e < USB_MAX_ENDPOINTS; e++) {
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if (usb_endpoints[e].flags &USB_EP_FLAGS_ENABLED) {
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USBBuffer *buffer = usb_endpoints[e].buffer;
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usb_endpoints[e].flags = 0;
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while(buffer) {
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buffer->flags &= ~USB_BUFFER_SUBMITTED;
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buffer = buffer->next;
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}
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}
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}
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usb_arch_setup_control_endpoint(0);
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USB->DADDR = 0x80;
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}
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void
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usb_arch_setup(void)
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{
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unsigned int i;
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RCC->APB1RSTR |= RCC_APB1RSTR_USBRST;
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RCC->APB2ENR |= (RCC_APB2ENR_AFIOEN | RCC_APB2ENR_IOPAEN);
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RCC->APB1ENR |= (RCC_APB1ENR_USBEN);
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RCC->APB1RSTR &= ~RCC_APB1RSTR_USBRST;
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GPIO_CONF_OUTPUT_PORT(A,11,ALT_PUSH_PULL,50);
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GPIO_CONF_OUTPUT_PORT(A,12,ALT_PUSH_PULL,50);
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GPIO_CONF_OUTPUT_PORT(A,10, PUSH_PULL, 2);
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GPIOA->BSRR = GPIO_BSRR_BR10;
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/* Turn on analog part */
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USB->CNTR &= ~USB_CNTR_PDWN;
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for (i = 0; i < 24; i++) asm("nop"::); /* Wait at least 1us */
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/* Release reset */
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USB->CNTR &= ~USB_CNTR_FRES;
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/* Clear any interrupts */
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USB->ISTR = ~(USB_ISTR_PMAOVR |USB_ISTR_ERR | USB_ISTR_WKUP | USB_ISTR_SUSP
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| USB_ISTR_RESET);
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for(i = 0; i < USB_MAX_ENDPOINTS; i++) {
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usb_endpoints[i].flags = 0;
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usb_endpoints[i].event_process = 0;
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}
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/* Put buffer table at beginning of buffer memory */
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USB->BTABLE = 0;
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usb_arch_reset();
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GPIOA->BSRR = GPIO_BSRR_BS10;
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USB->CNTR |= (USB_CNTR_CTRM | USB_CNTR_PMAOVRM | USB_CNTR_ERRM
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| USB_CNTR_WKUPM| USB_CNTR_SUSPM | USB_CNTR_RESETM);
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NVIC_SET_PRIORITY(USB_LP_CAN_RX0_IRQChannel, 4);
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NVIC_ENABLE_INT(USB_LP_CAN_RX0_IRQChannel);
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}
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#define EPR_RW (USB_EP0R_EP_TYPE|USB_EP0R_EP_KIND|USB_EP0R_EA)
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#define EPR_W0 (USB_EP0R_CTR_RX|USB_EP0R_CTR_TX)
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#define EPR_TOGGLE (USB_EP0R_DTOG_RX | USB_EP0R_STAT_RX \
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| USB_EP0R_DTOG_TX | USB_EP0R_STAT_TX)
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#define EPR_INVARIANT(epr) ((epr & (EPR_RW)) | EPR_W0)
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#define EPR_TOGGLE_SET(epr, mask, set) \
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((((epr) & (EPR_RW | (mask))) | EPR_W0) ^ (set))
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static void
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usb_arch_setup_endpoint(unsigned char addr)
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{
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USBEndpoint *ep = EP_STRUCT(addr);
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ep->status = 0;
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ep->flags = USB_EP_FLAGS_ENABLED;
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ep->buffer = 0;
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ep->addr = addr;
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ep->events = 0;
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ep->xfer_size = 0;
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};
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void
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usb_arch_setup_control_endpoint(unsigned char addr)
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{
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USB_HW_Buffer *buf_desc;
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unsigned int ei = EP_HW_NUM(addr);
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unsigned int epr;
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USBEndpoint *ep = EP_STRUCT(addr);
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usb_arch_setup_endpoint(addr);
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ep->flags |= USB_EP_FLAGS_TYPE_CONTROL;
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buf_desc = USB_EP_BUF_DESC(ei);
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buf_desc->ADDR_TX = USB_EP_BUF_OFFSET(ei);
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buf_desc->COUNT_TX = USB_EP_BUF_SIZE(ei)/2;
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buf_desc->ADDR_RX = USB_EP_BUF_OFFSET(ei) + USB_EP_BUF_SIZE(ei)/2;
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buf_desc->COUNT_RX = USB_EP_BUF_CAPACITY(USB_EP_BUF_SIZE(ei)/2);
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ep->xfer_size = USB_EP_BUF_SIZE(ei)/2;
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epr = USB->EPR[EP_HW_NUM(addr)];
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/* Clear interrupt flags */
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epr &= ~(USB_EP0R_CTR_RX | USB_EP0R_CTR_TX);
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/* NACK both directions */
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epr ^= USB_EPxR_STAT_RX_NAK | USB_EPxR_STAT_TX_NAK;
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/* Set control type */
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epr = ((epr & ~(USB_EP0R_EP_TYPE | USB_EP0R_EP_KIND))
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| USB_EPxR_EP_TYPE_CONTROL);
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/* Set address */
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epr = ((epr & ~USB_EP0R_EA) | addr);
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USB->EPR[EP_HW_NUM(addr)] = epr;
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}
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void
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usb_arch_setup_bulk_endpoint(unsigned char addr)
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{
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USB_HW_Buffer *buf_desc;
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unsigned int ei = EP_HW_NUM(addr);
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unsigned int epr;
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USBEndpoint *ep = EP_STRUCT(addr);
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usb_arch_setup_endpoint(addr);
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ep->flags |= USB_EP_FLAGS_TYPE_BULK;
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buf_desc = USB_EP_BUF_DESC(ei);
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buf_desc->ADDR_TX = USB_EP_BUF_OFFSET(ei);
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buf_desc->ADDR_RX = USB_EP_BUF_OFFSET(ei) + USB_EP_BUF_SIZE(ei)/2;
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epr = USB->EPR[ei];
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if (addr & 0x80) {
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/* IN */
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buf_desc->COUNT_TX_0 = 0;
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buf_desc->COUNT_TX_1 = 0;
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/* VALID transmission */
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epr ^= USB_EPxR_STAT_TX_VALID;
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} else {
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/* OUT */
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buf_desc->COUNT_RX_0 = USB_EP_BUF_CAPACITY(USB_EP_BUF_SIZE(ei)/2);
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buf_desc->COUNT_RX_1 = USB_EP_BUF_CAPACITY(USB_EP_BUF_SIZE(ei)/2);
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/* VALID reception */
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epr ^= USB_EPxR_STAT_RX_VALID;
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}
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ep->xfer_size = USB_EP_BUF_SIZE(ei)/2;
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/* Clear interrupt flags */
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epr &= ~(USB_EP0R_CTR_RX | USB_EP0R_CTR_TX);
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/* Set bulk type */
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epr = ((epr & ~(USB_EP0R_EP_TYPE | USB_EP0R_EP_KIND))
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||
|
| USB_EPxR_EP_TYPE_BULK | USB_EPxR_EP_DBL_BUF);
|
||
|
/* Set address */
|
||
|
epr = ((epr & ~USB_EP0R_EA) | addr);
|
||
|
USB->EPR[ei] = epr;
|
||
|
|
||
|
}
|
||
|
|
||
|
void
|
||
|
usb_arch_setup_interrupt_endpoint(unsigned char addr)
|
||
|
{
|
||
|
USB_HW_Buffer *buf_desc;
|
||
|
unsigned int ei = EP_HW_NUM(addr);
|
||
|
unsigned int epr;
|
||
|
USBEndpoint *ep = EP_STRUCT(addr);
|
||
|
usb_arch_setup_endpoint(addr);
|
||
|
ep->flags |= USB_EP_FLAGS_TYPE_INTERRUPT;
|
||
|
|
||
|
epr = USB->EPR[EP_HW_NUM(addr)];
|
||
|
|
||
|
buf_desc = USB_EP_BUF_DESC(ei);
|
||
|
if (addr & 0x80) {
|
||
|
/* IN */
|
||
|
buf_desc->ADDR_TX = USB_EP_BUF_OFFSET(ei);
|
||
|
buf_desc->COUNT_TX = USB_EP_BUF_SIZE(ei);
|
||
|
epr ^= USB_EPxR_STAT_TX_NAK;
|
||
|
} else {
|
||
|
/* OUT */
|
||
|
buf_desc->ADDR_RX = USB_EP_BUF_OFFSET(ei);
|
||
|
buf_desc->COUNT_RX = USB_EP_BUF_CAPACITY(USB_EP_BUF_SIZE(ei));
|
||
|
epr ^= USB_EPxR_STAT_RX_NAK;
|
||
|
}
|
||
|
ep->xfer_size = USB_EP_BUF_SIZE(ei);
|
||
|
/* Clear interrupt flags */
|
||
|
epr &= ~(USB_EP0R_CTR_RX | USB_EP0R_CTR_TX);
|
||
|
/* Set control type */
|
||
|
epr = ((epr & ~(USB_EP0R_EP_TYPE | USB_EP0R_EP_KIND))
|
||
|
| USB_EPxR_EP_TYPE_INTERRUPT);
|
||
|
/* Set address */
|
||
|
epr = ((epr & ~USB_EP0R_EA) | addr);
|
||
|
USB->EPR[EP_HW_NUM(addr)] = epr;
|
||
|
}
|
||
|
|
||
|
void
|
||
|
usb_arch_disable_endpoint(uint8_t addr)
|
||
|
{
|
||
|
unsigned int epr;
|
||
|
USBEndpoint *ep = EP_STRUCT(addr);
|
||
|
ep->flags &= ~USB_EP_FLAGS_ENABLED;
|
||
|
|
||
|
epr = USB->EPR[EP_HW_NUM(addr)];
|
||
|
|
||
|
epr ^= USB_EPxR_STAT_TX_DISABLED | USB_EPxR_STAT_RX_DISABLED;
|
||
|
/* Clear interrupt flags */
|
||
|
epr &= ~(USB_EP0R_CTR_RX | USB_EP0R_CTR_TX);
|
||
|
USB->EPR[EP_HW_NUM(addr)] = epr;
|
||
|
}
|
||
|
|
||
|
inline void
|
||
|
stall_bulk_in(unsigned int hw_ep)
|
||
|
{
|
||
|
volatile uint32_t *eprp = &USB->EPR[hw_ep];
|
||
|
*eprp = (*eprp & (EPR_RW | USB_EP0R_STAT_TX_1)) | EPR_W0;
|
||
|
PRINTF("HALT IN\n");
|
||
|
}
|
||
|
|
||
|
inline void
|
||
|
stall_bulk_out(unsigned int hw_ep)
|
||
|
{
|
||
|
volatile uint32_t *eprp = &USB->EPR[hw_ep];
|
||
|
*eprp = (*eprp & ((EPR_RW | USB_EP0R_STAT_RX_1) & ~USB_EP0R_CTR_RX)) |EPR_W0;
|
||
|
PRINTF("HALT OUT\n");
|
||
|
}
|
||
|
|
||
|
|
||
|
#define USB_READ_BLOCK 0x01 /* The currently submitted buffers
|
||
|
can't hold the received data, wait
|
||
|
for more buffers. No data was read
|
||
|
from the hardware buffer */
|
||
|
#define USB_READ_NOTIFY 0x02 /* Some buffers that had the
|
||
|
USB_BUFFER_NOTIFY flags set were
|
||
|
released */
|
||
|
#define USB_READ_FAIL 0x04 /* The received data doesn't match the
|
||
|
submitted buffers. The hardware
|
||
|
buffer is discarded. */
|
||
|
|
||
|
inline unsigned int
|
||
|
ep_capacity(unsigned int count)
|
||
|
{
|
||
|
return (((count & USB_COUNT0_RX_NUM_BLOCK)>>10)
|
||
|
* ((count & USB_COUNT0_RX_BLSIZE) ? 32 : 2));
|
||
|
}
|
||
|
|
||
|
/* Skip buffers until mask and flags matches*/
|
||
|
static USBBuffer *
|
||
|
skip_buffers_until(USBBuffer *buffer, unsigned int mask, unsigned int flags,
|
||
|
unsigned int *resp)
|
||
|
{
|
||
|
while(buffer && !((buffer->flags & mask) == flags)) {
|
||
|
USBBuffer *next = buffer->next;
|
||
|
buffer->flags &= ~USB_BUFFER_SUBMITTED ;
|
||
|
buffer->flags |= USB_BUFFER_FAILED;
|
||
|
if (buffer->flags & USB_BUFFER_NOTIFY) *resp |= USB_READ_NOTIFY;
|
||
|
buffer = next;
|
||
|
}
|
||
|
return buffer;
|
||
|
}
|
||
|
|
||
|
static void
|
||
|
read_hw_buffer(USBBuffer *buffer, unsigned int offset, unsigned int len)
|
||
|
{
|
||
|
#ifdef USB_STM32F103_ENABLE_ALT_COPY
|
||
|
if (buffer->flags & USB_BUFFER_ARCH_ALT_COPY) {
|
||
|
copy_from_hw_buffer(buffer, offset, len);
|
||
|
} else
|
||
|
#endif
|
||
|
{
|
||
|
uint8_t *data = buffer->data;
|
||
|
const uint32_t *hw_data = ((u32*)USB_MEM_BASE) + offset/2;
|
||
|
buffer->data += len;
|
||
|
if (offset & 1) {
|
||
|
*data++ = *hw_data++ >> 8;
|
||
|
len--;
|
||
|
}
|
||
|
while(len >= 2) {
|
||
|
*((uint16_t*)data) = *hw_data++;
|
||
|
data += 2;
|
||
|
len -= 2;
|
||
|
}
|
||
|
if (len == 1) {
|
||
|
*data++ = *hw_data;
|
||
|
}
|
||
|
}
|
||
|
}
|
||
|
|
||
|
|
||
|
#define USB_WRITE_BLOCK 0x01
|
||
|
#define USB_WRITE_NOTIFY 0x02
|
||
|
|
||
|
static void
|
||
|
write_hw_buffer(USBBuffer *buffer,unsigned int offset, unsigned int len)
|
||
|
{
|
||
|
#ifdef USB_STM32F103_ENABLE_ALT_COPY
|
||
|
if (buffer->flags & USB_BUFFER_ARCH_ALT_COPY) {
|
||
|
copy_to_hw_buffer(buffer, offset, len);
|
||
|
} else
|
||
|
#endif
|
||
|
{
|
||
|
const uint8_t *data = buffer->data;
|
||
|
uint32_t *hw_data = ((u32*)USB_MEM_BASE) + offset/2;
|
||
|
buffer->data += len;
|
||
|
if (offset & 1) {
|
||
|
*hw_data = (*hw_data & 0xff) | (*data++ << 8);
|
||
|
hw_data++;
|
||
|
len--;
|
||
|
}
|
||
|
while(len >= 2) {
|
||
|
*hw_data++ = *((uint16_t*)data) ;
|
||
|
data += 2;
|
||
|
len -= 2;
|
||
|
}
|
||
|
if (len == 1) {
|
||
|
*hw_data = *data++;
|
||
|
}
|
||
|
}
|
||
|
}
|
||
|
|
||
|
static unsigned int
|
||
|
get_receive_capacity(USBBuffer *buffer)
|
||
|
{
|
||
|
unsigned int capacity = 0;
|
||
|
while(buffer && !(buffer->flags & (USB_BUFFER_IN| USB_BUFFER_SETUP))) {
|
||
|
capacity += buffer->left;
|
||
|
buffer = buffer->next;
|
||
|
}
|
||
|
return capacity;
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
handle_pending_receive(USBEndpoint *ep)
|
||
|
{
|
||
|
int short_packet;
|
||
|
unsigned int len;
|
||
|
unsigned int copy;
|
||
|
unsigned int res = 0;
|
||
|
unsigned int hw_offset;
|
||
|
unsigned int hw_ep = EP_HW_NUM(ep->addr);
|
||
|
USBBuffer *buffer = ep->buffer;
|
||
|
unsigned int flags = ep->flags;
|
||
|
USB_HW_Buffer *buf_desc = USB_EP_BUF_DESC(hw_ep);
|
||
|
PRINTF("handle_pending_receive:\n");
|
||
|
if (!(flags & USB_EP_FLAGS_ENABLED) || !buffer) return USB_READ_BLOCK;
|
||
|
switch(flags & USB_EP_FLAGS_TYPE_MASK) {
|
||
|
case USB_EP_FLAGS_TYPE_CONTROL:
|
||
|
len = buf_desc->COUNT_RX & USB_COUNT0_RX_COUNT0_RX;
|
||
|
if (flags & USB_EP_FLAGS_SETUP_PENDING) {
|
||
|
/* Discard buffers until we find a SETUP buffer */
|
||
|
buffer =
|
||
|
skip_buffers_until(buffer, USB_BUFFER_SETUP, USB_BUFFER_SETUP, &res);
|
||
|
ep->buffer = buffer;
|
||
|
if (!buffer || buffer->left < len) {
|
||
|
res |= USB_READ_BLOCK;
|
||
|
return res;
|
||
|
}
|
||
|
/* SETUP buffer must fit in a single buffer */
|
||
|
if (buffer->left < len) {
|
||
|
buffer->flags |= USB_BUFFER_FAILED;
|
||
|
buffer->flags &= ~USB_BUFFER_SUBMITTED ;
|
||
|
if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
|
||
|
ep->buffer = buffer->next;
|
||
|
res |= USB_READ_FAIL;
|
||
|
return res;
|
||
|
}
|
||
|
} else {
|
||
|
if (buffer->flags & (USB_BUFFER_SETUP|USB_BUFFER_IN)) {
|
||
|
buffer->flags |= USB_BUFFER_FAILED;
|
||
|
|
||
|
buffer->flags &= ~USB_BUFFER_SUBMITTED ;
|
||
|
if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
|
||
|
ep->buffer = buffer->next;
|
||
|
res |= USB_READ_FAIL;
|
||
|
return res;
|
||
|
}
|
||
|
|
||
|
if (len == 0) {
|
||
|
/* Status OUT */
|
||
|
if (buffer->left > 0) {
|
||
|
buffer->flags |= USB_BUFFER_FAILED;
|
||
|
res |= USB_READ_FAIL;
|
||
|
}
|
||
|
buffer->flags &= ~USB_BUFFER_SUBMITTED ;
|
||
|
if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
|
||
|
ep->buffer = buffer->next;
|
||
|
return res;
|
||
|
}
|
||
|
if (get_receive_capacity(buffer) < len) return USB_READ_BLOCK;
|
||
|
}
|
||
|
hw_offset = buf_desc->ADDR_RX;
|
||
|
break;
|
||
|
case USB_EP_FLAGS_TYPE_INTERRUPT:
|
||
|
len = buf_desc->COUNT_RX & USB_COUNT0_RX_COUNT0_RX;
|
||
|
if (get_receive_capacity(buffer) < len) return USB_READ_BLOCK;
|
||
|
hw_offset = buf_desc->ADDR_RX;
|
||
|
break;
|
||
|
case USB_EP_FLAGS_TYPE_BULK:
|
||
|
if (USB->EPR[hw_ep] & USB_EPxR_SW_BUF_RX) {
|
||
|
len = buf_desc->COUNT_RX_1 & USB_COUNT0_RX_COUNT0_RX;
|
||
|
hw_offset = buf_desc->ADDR_RX_1;
|
||
|
} else {
|
||
|
len = buf_desc->COUNT_RX_0 & USB_COUNT0_RX_COUNT0_RX;
|
||
|
hw_offset = buf_desc->ADDR_RX_0;
|
||
|
}
|
||
|
if (get_receive_capacity(buffer) < len) return USB_READ_BLOCK;
|
||
|
break;
|
||
|
case USB_EP_FLAGS_TYPE_ISO:
|
||
|
len = buf_desc->COUNT_RX & USB_COUNT0_RX_COUNT0_RX;
|
||
|
if (get_receive_capacity(buffer) < len) return USB_READ_BLOCK;
|
||
|
hw_offset = buf_desc->ADDR_RX;
|
||
|
}
|
||
|
/* printf("handle_pending_receive: %d %04x\n", len, ep->flags); */
|
||
|
short_packet = len < ep->xfer_size;
|
||
|
|
||
|
do {
|
||
|
if (buffer->left < len) {
|
||
|
copy = buffer->left;
|
||
|
} else {
|
||
|
copy = len;
|
||
|
}
|
||
|
len -= copy;
|
||
|
buffer->left -= copy;
|
||
|
read_hw_buffer(buffer, hw_offset, copy);
|
||
|
hw_offset += copy;
|
||
|
|
||
|
if (len == 0) break;
|
||
|
|
||
|
/* Release buffer */
|
||
|
buffer->flags &= ~(USB_BUFFER_SUBMITTED | USB_BUFFER_SHORT_PACKET);
|
||
|
if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
|
||
|
/* Use next buffer. */
|
||
|
buffer = buffer->next;
|
||
|
} while(1);
|
||
|
|
||
|
if (short_packet) {
|
||
|
buffer->flags |= USB_BUFFER_SHORT_PACKET;
|
||
|
}
|
||
|
|
||
|
if ((buffer->left == 0)
|
||
|
|| (buffer->flags & USB_BUFFER_PACKET_END)
|
||
|
|| (short_packet && (buffer->flags & USB_BUFFER_SHORT_END))) {
|
||
|
/* Release buffer */
|
||
|
buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
||
|
if (buffer->flags & USB_BUFFER_NOTIFY) res |= USB_READ_NOTIFY;
|
||
|
/* Use next buffer. */
|
||
|
buffer = buffer->next;
|
||
|
}
|
||
|
|
||
|
ep->buffer = buffer;
|
||
|
if (IS_BULK_EP(ep)) {
|
||
|
USB->EPR[hw_ep] = EPR_INVARIANT(USB->EPR[hw_ep]) | USB_EPxR_SW_BUF_RX;
|
||
|
}
|
||
|
|
||
|
/* PRINTF("read_endpoint %d %d\n", (int)hw_offset-buf_desc->ADDR_RX, (int)buf_desc->ADDR_RX); */
|
||
|
return res;
|
||
|
}
|
||
|
|
||
|
|
||
|
static void
|
||
|
start_receive(USBEndpoint *ep)
|
||
|
{
|
||
|
unsigned int hw_ep = EP_HW_NUM(ep->addr);
|
||
|
uint32_t epr = (USB->EPR[hw_ep] | EPR_W0);
|
||
|
uint32_t epr_mask = EPR_RW | EPR_W0;
|
||
|
switch(ep->flags & USB_EP_FLAGS_TYPE_MASK) {
|
||
|
case USB_EP_FLAGS_TYPE_CONTROL:
|
||
|
case USB_EP_FLAGS_TYPE_INTERRUPT:
|
||
|
{
|
||
|
unsigned int capacity = get_receive_capacity(ep->buffer);
|
||
|
if (capacity <= ep->xfer_size) {
|
||
|
/* This is the last OUT packet of the data stage */
|
||
|
epr ^= USB_EPxR_STAT_TX_NAK;
|
||
|
} else {
|
||
|
epr ^= USB_EPxR_STAT_TX_STALL;
|
||
|
}
|
||
|
epr ^= USB_EPxR_STAT_RX_VALID;
|
||
|
epr_mask |= USB_EP0R_STAT_TX | USB_EP0R_STAT_RX;
|
||
|
}
|
||
|
break;
|
||
|
case USB_EP_FLAGS_TYPE_BULK:
|
||
|
case USB_EP_FLAGS_TYPE_ISO:
|
||
|
break;
|
||
|
}
|
||
|
ep->flags |= USB_EP_FLAGS_RECEIVING;
|
||
|
USB->EPR[hw_ep] = epr & epr_mask;
|
||
|
}
|
||
|
|
||
|
static unsigned int
|
||
|
get_transmit_length(USBBuffer *buffer)
|
||
|
{
|
||
|
unsigned int length = 0;
|
||
|
while(buffer && (buffer->flags & USB_BUFFER_IN)) {
|
||
|
length += buffer->left;
|
||
|
buffer = buffer->next;
|
||
|
}
|
||
|
return length;
|
||
|
}
|
||
|
|
||
|
static int
|
||
|
start_transmit(USBEndpoint *ep)
|
||
|
{
|
||
|
unsigned int hw_start;
|
||
|
unsigned int res = 0;
|
||
|
USBBuffer *buffer = ep->buffer;
|
||
|
unsigned int len;
|
||
|
unsigned int hw_offset;
|
||
|
volatile uint32_t *hw_countp;
|
||
|
unsigned int hw_ep = EP_HW_NUM(ep->addr);
|
||
|
uint32_t epr = USB->EPR[hw_ep];
|
||
|
unsigned int ep_flags = ep->flags;
|
||
|
USB_HW_Buffer *buf_desc = USB_EP_BUF_DESC(hw_ep);
|
||
|
len = ep->xfer_size;
|
||
|
if (!(ep_flags & USB_EP_FLAGS_ENABLED) || !buffer) return USB_WRITE_BLOCK;
|
||
|
/* PRINTF("start_transmit: %02x\n", ep->addr); */
|
||
|
switch(ep_flags & USB_EP_FLAGS_TYPE_MASK) {
|
||
|
case USB_EP_FLAGS_TYPE_CONTROL:
|
||
|
|
||
|
if (get_transmit_length(ep->buffer) <= len) {
|
||
|
/* This is the last IN packet of the data stage */
|
||
|
USB->EPR[hw_ep] = USB_EPxR_EP_STATUS_OUT
|
||
|
| EPR_TOGGLE_SET(epr, USB_EP0R_STAT_RX, USB_EPxR_STAT_RX_NAK);
|
||
|
} else {
|
||
|
USB->EPR[hw_ep] = USB_EPxR_EP_STATUS_OUT
|
||
|
| EPR_TOGGLE_SET(epr, USB_EP0R_STAT_RX, USB_EPxR_STAT_RX_STALL);
|
||
|
}
|
||
|
hw_offset = buf_desc->ADDR_TX;
|
||
|
hw_countp = &buf_desc->COUNT_TX;
|
||
|
break;
|
||
|
case USB_EP_FLAGS_TYPE_BULK:
|
||
|
if (buffer->flags & USB_BUFFER_HALT) {
|
||
|
if (ep->status & 0x01) return USB_READ_BLOCK;
|
||
|
ep->status |= 0x01;
|
||
|
stall_bulk_in(hw_ep);
|
||
|
return USB_READ_BLOCK;
|
||
|
}
|
||
|
if (USB->EPR[hw_ep] & USB_EPxR_SW_BUF_TX) {
|
||
|
hw_offset = buf_desc->ADDR_TX_1;
|
||
|
hw_countp = &buf_desc->COUNT_TX_1;
|
||
|
} else {
|
||
|
hw_offset = buf_desc->ADDR_TX_0;
|
||
|
hw_countp = &buf_desc->COUNT_TX_0;
|
||
|
}
|
||
|
break;
|
||
|
}
|
||
|
hw_start = hw_offset;
|
||
|
while (buffer) {
|
||
|
unsigned int copy;
|
||
|
if (buffer->left < len) {
|
||
|
copy = buffer->left;
|
||
|
} else {
|
||
|
copy = len;
|
||
|
}
|
||
|
len -= copy;
|
||
|
buffer->left -= copy;
|
||
|
write_hw_buffer(buffer, hw_offset, copy);
|
||
|
hw_offset += copy;
|
||
|
if (buffer->left == 0) {
|
||
|
if (buffer->flags & USB_BUFFER_SHORT_END) {
|
||
|
if (len == 0) {
|
||
|
/* Avoid endless loop */
|
||
|
buffer->flags &= ~USB_BUFFER_SHORT_END;
|
||
|
/* Send zero length packet. */
|
||
|
break;
|
||
|
} else {
|
||
|
len = 0;
|
||
|
}
|
||
|
}
|
||
|
/* Release buffer */
|
||
|
buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
||
|
if (buffer->flags & USB_BUFFER_NOTIFY) res = USB_WRITE_NOTIFY;
|
||
|
/* Use next buffer. */
|
||
|
buffer = buffer->next;
|
||
|
}
|
||
|
if (len == 0) break;
|
||
|
}
|
||
|
ep->buffer = buffer;
|
||
|
if (ep->flags & USB_EP_FLAGS_TRANSMITTING) {
|
||
|
ep->flags |= USB_EP_FLAGS_DOUBLE;
|
||
|
} else {
|
||
|
ep->flags |= USB_EP_FLAGS_TRANSMITTING;
|
||
|
}
|
||
|
*hw_countp = hw_offset - hw_start;
|
||
|
/* printf("start_transmit: %02x %d %04lx\n", ep->addr, hw_offset - hw_start, USB->EPR[hw_ep]); */
|
||
|
switch(ep->flags & USB_EP_FLAGS_TYPE_MASK) {
|
||
|
case USB_EP_FLAGS_TYPE_CONTROL:
|
||
|
case USB_EP_FLAGS_TYPE_INTERRUPT:
|
||
|
USB->EPR[hw_ep] =
|
||
|
EPR_TOGGLE_SET(epr, USB_EP0R_STAT_TX, USB_EPxR_STAT_TX_VALID);
|
||
|
break;
|
||
|
case USB_EP_FLAGS_TYPE_BULK:
|
||
|
USB->EPR[hw_ep] = EPR_INVARIANT(USB->EPR[hw_ep]) | USB_EPxR_SW_BUF_TX;
|
||
|
break;
|
||
|
case USB_EP_FLAGS_TYPE_ISO:
|
||
|
break;
|
||
|
}
|
||
|
/* printf("start_transmit: %04x\n", USB->EPR[hw_ep]); */
|
||
|
return res;
|
||
|
}
|
||
|
|
||
|
static void
|
||
|
start_transfer(USBEndpoint *ep)
|
||
|
{
|
||
|
int res;
|
||
|
while (1) {
|
||
|
if (!(ep->addr & 0x80) && (IS_BULK_EP(ep) || IS_INTERRUPT_EP(ep))) {
|
||
|
if (ep->buffer && (ep->buffer->flags & USB_BUFFER_HALT)) {
|
||
|
if (ep->status & 0x01) return ;
|
||
|
ep->status |= 0x01;
|
||
|
stall_bulk_out(EP_HW_NUM(ep->addr));
|
||
|
return;
|
||
|
}
|
||
|
}
|
||
|
if (!(ep->flags & USB_EP_FLAGS_RECV_PENDING)) break;
|
||
|
res = handle_pending_receive(ep);
|
||
|
if (res & USB_READ_NOTIFY) {
|
||
|
notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
|
||
|
}
|
||
|
if (res & USB_READ_BLOCK) return;
|
||
|
if (ep->flags & USB_EP_FLAGS_DOUBLE) {
|
||
|
ep->flags &= ~USB_EP_FLAGS_DOUBLE;
|
||
|
} else {
|
||
|
ep->flags &= ~(USB_EP_FLAGS_RECV_PENDING|USB_EP_FLAGS_SETUP_PENDING);
|
||
|
}
|
||
|
if (res & USB_READ_FAIL) {
|
||
|
/* Only fails for control endpoints */
|
||
|
usb_arch_control_stall(ep->addr);
|
||
|
return;
|
||
|
}
|
||
|
}
|
||
|
if (ep->addr == 0x02)
|
||
|
PRINTF("start EPR: %04x ep->flags: %02x\n",
|
||
|
(unsigned int)USB->EPR[EP_HW_NUM(ep->addr)],
|
||
|
(unsigned int)ep->flags);
|
||
|
if (ep->flags & (USB_EP_FLAGS_TRANSMITTING | USB_EP_FLAGS_RECEIVING)) {
|
||
|
if (!IS_BULK_EP(ep) || (ep->flags & USB_EP_FLAGS_DOUBLE)) {
|
||
|
PRINTF("Busy\n");
|
||
|
return;
|
||
|
}
|
||
|
}
|
||
|
if (ep->status & 0x01) return; /* Don't start transfer if halted */
|
||
|
if (ep->buffer) {
|
||
|
if (ep->buffer->flags & USB_BUFFER_IN) {
|
||
|
res = start_transmit(ep);
|
||
|
if (res & USB_READ_NOTIFY) {
|
||
|
notify_ep_process(ep, USB_EP_EVENT_NOTIFICATION);
|
||
|
}
|
||
|
} else {
|
||
|
start_receive(ep);
|
||
|
}
|
||
|
}
|
||
|
}
|
||
|
|
||
|
|
||
|
static void
|
||
|
transfer_complete(unsigned int hw_ep) {
|
||
|
uint32_t epr = USB->EPR[hw_ep];
|
||
|
USBEndpoint *ep = &usb_endpoints[hw_ep];
|
||
|
if (epr &USB_EP0R_CTR_RX) {
|
||
|
PRINTF("Received packet %lx %04x\n", USB_EP_BUF_DESC(hw_ep)->COUNT_RX, (int)USB->EPR[hw_ep]);
|
||
|
if (epr & USB_EP0R_SETUP) {
|
||
|
PRINTF("SETUP\n");
|
||
|
ep->flags |= USB_EP_FLAGS_SETUP_PENDING;
|
||
|
}
|
||
|
|
||
|
if (IS_BULK_EP(ep)) {
|
||
|
if ((epr ^ (epr >> 8)) & USB_EP0R_DTOG_TX) {
|
||
|
ep->flags &= ~USB_EP_FLAGS_DOUBLE;
|
||
|
} else {
|
||
|
ep->flags |= USB_EP_FLAGS_DOUBLE;
|
||
|
ep->flags &= ~USB_EP_FLAGS_RECEIVING;
|
||
|
}
|
||
|
} else {
|
||
|
ep->flags &= ~USB_EP_FLAGS_RECEIVING;
|
||
|
}
|
||
|
ep->flags |= USB_EP_FLAGS_RECV_PENDING;
|
||
|
if (IS_CONTROL_EP(ep)) epr &= ~USB_EPxR_EP_STATUS_OUT;
|
||
|
USB->EPR[hw_ep] = EPR_INVARIANT(epr) & ~USB_EP0R_CTR_RX;
|
||
|
#if 0
|
||
|
if (ep->flags & USB_EP_FLAGS_DOUBLE) {
|
||
|
printf("Double\n");
|
||
|
}
|
||
|
#endif
|
||
|
|
||
|
start_transfer(ep);
|
||
|
}
|
||
|
if (epr &USB_EP0R_CTR_TX) {
|
||
|
PRINTF("Sent packet\n");
|
||
|
if (ep->flags & USB_EP_FLAGS_DOUBLE) {
|
||
|
ep->flags &= ~USB_EP_FLAGS_DOUBLE;
|
||
|
} else {
|
||
|
ep->flags &= ~USB_EP_FLAGS_TRANSMITTING;
|
||
|
}
|
||
|
USB->EPR[hw_ep] = EPR_INVARIANT(USB->EPR[hw_ep]) & ~USB_EP0R_CTR_TX;
|
||
|
start_transfer(ep);
|
||
|
}
|
||
|
|
||
|
}
|
||
|
|
||
|
|
||
|
void
|
||
|
usb_set_ep_event_process(unsigned char addr, struct process *p)
|
||
|
{
|
||
|
USBEndpoint *ep = &usb_endpoints[EP_INDEX(addr)];
|
||
|
ep->event_process = p;
|
||
|
}
|
||
|
|
||
|
/* Select what process should be polled when a global event occurs */
|
||
|
void
|
||
|
usb_arch_set_global_event_process(struct process *p)
|
||
|
{
|
||
|
event_process = p;
|
||
|
}
|
||
|
|
||
|
unsigned int
|
||
|
usb_arch_get_global_events(void)
|
||
|
{
|
||
|
unsigned int e;
|
||
|
USB_DISABLE_INT;
|
||
|
e = events;
|
||
|
events = 0;
|
||
|
USB_DISABLE_INT;
|
||
|
return e;
|
||
|
}
|
||
|
|
||
|
unsigned int
|
||
|
usb_get_ep_events(unsigned char addr)
|
||
|
{
|
||
|
unsigned int e;
|
||
|
unsigned int ei = EP_HW_NUM(addr);
|
||
|
USB_DISABLE_INT;
|
||
|
e = usb_endpoints[ei].events;
|
||
|
usb_endpoints[ei].events = 0;
|
||
|
USB_ENABLE_INT;
|
||
|
return e;
|
||
|
}
|
||
|
|
||
|
|
||
|
void
|
||
|
usb_submit_recv_buffer(unsigned char ep_addr, USBBuffer *buffer)
|
||
|
{
|
||
|
USBBuffer **tailp;
|
||
|
USBEndpoint *ep = &usb_endpoints[EP_INDEX(ep_addr)];
|
||
|
if (!(ep->flags & USB_EP_FLAGS_ENABLED)) return;
|
||
|
/* PRINTF("buffer: %p\n", ep->buffer); */
|
||
|
/* dbg_drain(); */
|
||
|
USB_DISABLE_INT;
|
||
|
tailp = (USBBuffer**)&ep->buffer;
|
||
|
while(*tailp) {
|
||
|
tailp = &(*tailp)->next;
|
||
|
}
|
||
|
*tailp = buffer;
|
||
|
while(buffer) {
|
||
|
buffer->flags |= USB_BUFFER_SUBMITTED;
|
||
|
buffer = buffer->next;
|
||
|
}
|
||
|
start_transfer(ep);
|
||
|
|
||
|
USB_ENABLE_INT;
|
||
|
}
|
||
|
|
||
|
void
|
||
|
usb_submit_xmit_buffer(unsigned char ep_addr, USBBuffer *buffer)
|
||
|
{
|
||
|
USBBuffer **tailp;
|
||
|
USBEndpoint *ep = &usb_endpoints[EP_INDEX(ep_addr)];
|
||
|
if (!(ep->flags & USB_EP_FLAGS_ENABLED)) return;
|
||
|
/* PRINTF("usb_submit_xmit_buffer %d\n", buffer->left); */
|
||
|
USB_DISABLE_INT;
|
||
|
tailp = (USBBuffer**)&ep->buffer;
|
||
|
while(*tailp) {
|
||
|
tailp = &(*tailp)->next;
|
||
|
}
|
||
|
*tailp = buffer;
|
||
|
while(buffer) {
|
||
|
buffer->flags |= USB_BUFFER_SUBMITTED | USB_BUFFER_IN;
|
||
|
buffer = buffer->next;
|
||
|
}
|
||
|
start_transfer(ep);
|
||
|
USB_ENABLE_INT;
|
||
|
}
|
||
|
|
||
|
void
|
||
|
usb_arch_discard_all_buffers(unsigned char ep_addr)
|
||
|
{
|
||
|
uint32_t ints;
|
||
|
USBBuffer *buffer;
|
||
|
volatile USBEndpoint *ep = &usb_endpoints[EP_INDEX(ep_addr)];
|
||
|
ints = usb_save_disable_int();
|
||
|
buffer = ep->buffer;
|
||
|
ep->buffer = NULL;
|
||
|
#if 0
|
||
|
/* Set both directions to NAK */
|
||
|
USB->EPR[EP_HW_NUM(ep_addr)] =
|
||
|
EPR_TOGGLE_SET(USB->EPR[EP_HW_NUM(ep_addr)],
|
||
|
USB_EP0R_STAT_RX|USB_EP0R_STAT_TX,
|
||
|
USB_EPxR_STAT_TX_NAK| USB_EPxR_STAT_RX_NAK);
|
||
|
ep->flags &= ~(USB_EP_FLAGS_RECV_PENDING|USB_EP_FLAGS_SETUP_PENDING);
|
||
|
#endif
|
||
|
ep->flags &= ~(USB_EP_FLAGS_RECV_PENDING | USB_EP_FLAGS_SETUP_PENDING
|
||
|
| USB_EP_FLAGS_DOUBLE);
|
||
|
usb_restore_int(ints);
|
||
|
while(buffer) {
|
||
|
buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
||
|
buffer = buffer->next;
|
||
|
}
|
||
|
}
|
||
|
uint16_t
|
||
|
usb_arch_get_ep_status(uint8_t addr)
|
||
|
{
|
||
|
if (EP_INDEX(addr) > USB_MAX_ENDPOINTS) return 0;
|
||
|
return usb_endpoints[EP_INDEX(addr)].status;
|
||
|
}
|
||
|
|
||
|
void
|
||
|
usb_arch_set_configuration(uint8_t usb_configuration_value)
|
||
|
{
|
||
|
/* Nothing needs to be done */
|
||
|
}
|
||
|
|
||
|
void
|
||
|
usb_arch_control_stall(unsigned char addr)
|
||
|
{
|
||
|
if (EP_INDEX(addr) > USB_MAX_ENDPOINTS) return;
|
||
|
uint32_t epr = USB->EPR[EP_HW_NUM(addr)];
|
||
|
USB->EPR[EP_HW_NUM(addr)] = EPR_TOGGLE_SET(epr,USB_EP0R_STAT_RX|USB_EP0R_STAT_TX, USB_EPxR_STAT_RX_STALL | USB_EPxR_STAT_TX_STALL);
|
||
|
}
|
||
|
|
||
|
/* Not for control endpoints */
|
||
|
void
|
||
|
usb_arch_halt_endpoint(unsigned char ep_addr, int halt)
|
||
|
{
|
||
|
if (EP_INDEX(ep_addr) > USB_MAX_ENDPOINTS) return;
|
||
|
if (!usb_endpoints[EP_INDEX(ep_addr)].flags & USB_EP_FLAGS_ENABLED) return;
|
||
|
USB_DISABLE_INT;
|
||
|
if (halt) {
|
||
|
if (!(usb_endpoints[EP_INDEX(ep_addr)].status & 0x01)) {
|
||
|
usb_endpoints[EP_INDEX(ep_addr)].status |= 0x01;
|
||
|
if (ep_addr & 0x80) {
|
||
|
stall_bulk_in(EP_HW_NUM(ep_addr));
|
||
|
} else {
|
||
|
stall_bulk_out(EP_HW_NUM(ep_addr));
|
||
|
}
|
||
|
}
|
||
|
} else {
|
||
|
USBEndpoint *ep = &usb_endpoints[EP_INDEX(ep_addr)];
|
||
|
if (ep->status & 0x01) {
|
||
|
ep->status &= ~0x01;
|
||
|
PRINTF("HALT clear restart EPR: %04x %p %p\n",
|
||
|
(unsigned int)USB->EPR[EP_HW_NUM(ep_addr)],
|
||
|
ep->buffer, ep->buffer->next);
|
||
|
/* Restore toggle state for double buffered endpoint */
|
||
|
if (IS_BULK_EP(ep)) {
|
||
|
volatile uint32_t *eprp = &USB->EPR[EP_HW_NUM(ep_addr)];
|
||
|
if (ep_addr & 0x80) {
|
||
|
ep->flags &= ~(USB_EP_FLAGS_DOUBLE |USB_EP_FLAGS_TRANSMITTING);
|
||
|
|
||
|
*eprp =(EPR_TOGGLE_SET(*eprp,(USB_EP0R_STAT_TX | USB_EP0R_DTOG_TX
|
||
|
| USB_EPxR_SW_BUF_TX),
|
||
|
USB_EPxR_STAT_TX_VALID));
|
||
|
} else {
|
||
|
ep->flags &= ~(USB_EP_FLAGS_DOUBLE | USB_EP_FLAGS_RECEIVING
|
||
|
| USB_EP_FLAGS_RECV_PENDING);
|
||
|
|
||
|
*eprp =(EPR_TOGGLE_SET(*eprp,(USB_EP0R_STAT_RX | USB_EP0R_DTOG_RX
|
||
|
| USB_EPxR_SW_BUF_RX),
|
||
|
USB_EPxR_STAT_RX_VALID|USB_EPxR_SW_BUF_RX));
|
||
|
*eprp = EPR_INVARIANT(*eprp) | USB_EPxR_SW_BUF_RX;
|
||
|
|
||
|
}
|
||
|
}
|
||
|
/* Release HALT buffer */
|
||
|
if (ep->buffer && (ep->buffer->flags & USB_BUFFER_HALT)) {
|
||
|
ep->buffer->flags &= ~USB_BUFFER_SUBMITTED;
|
||
|
if (ep->buffer->flags & USB_BUFFER_NOTIFY) {
|
||
|
notify_ep_process(ep,USB_EP_EVENT_NOTIFICATION);
|
||
|
}
|
||
|
ep->buffer = ep->buffer->next;
|
||
|
}
|
||
|
/* Restart transmission */
|
||
|
start_transfer(&usb_endpoints[EP_INDEX(ep_addr)]);
|
||
|
PRINTF("HALT clear restart EPR: %04x %p %p\n",
|
||
|
(unsigned int)USB->EPR[EP_HW_NUM(ep_addr)],
|
||
|
ep->buffer, ep->buffer->next);
|
||
|
|
||
|
}
|
||
|
}
|
||
|
USB_ENABLE_INT;
|
||
|
}
|
||
|
|
||
|
void
|
||
|
usb_arch_set_address(unsigned char addr)
|
||
|
{
|
||
|
USB->DADDR = 0x80 | addr;
|
||
|
}
|
||
|
|
||
|
void
|
||
|
USB_HP_CAN_TX_handler(void) __attribute__((interrupt));
|
||
|
|
||
|
void
|
||
|
USB_HP_CAN_TX_handler(void)
|
||
|
{
|
||
|
uint32_t status = USB->ISTR;
|
||
|
if (status & USB_ISTR_CTR) {
|
||
|
transfer_complete(status & USB_ISTR_EP_ID);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
void
|
||
|
USB_LP_CAN_RX0_handler(void) __attribute__((interrupt));
|
||
|
void
|
||
|
USB_LP_CAN_RX0_handler(void)
|
||
|
{
|
||
|
uint32_t status = USB->ISTR;
|
||
|
if (status & USB_ISTR_CTR) {
|
||
|
transfer_complete(status & USB_ISTR_EP_ID);
|
||
|
/* PRINTF("Transfer complete ep %ld\n", status & USB_ISTR_EP_ID); */
|
||
|
} else if (status & USB_ISTR_PMAOVR) {
|
||
|
PRINTF("PMAOVR\n");
|
||
|
USB->ISTR &= ~USB_ISTR_PMAOVR;
|
||
|
} else if (status & USB_ISTR_ERR) {
|
||
|
PRINTF("ERR\n");
|
||
|
USB->ISTR &= ~USB_ISTR_ERR;
|
||
|
} else if (status & USB_ISTR_WKUP) {
|
||
|
PRINTF("WKUP\n");
|
||
|
USB->ISTR &= ~USB_ISTR_WKUP;
|
||
|
USB->CNTR &= ~USB_CNTR_FSUSP;
|
||
|
notify_process(USB_EVENT_RESUME);
|
||
|
} else if (status & USB_ISTR_SUSP) {
|
||
|
PRINTF("SUSP\n");
|
||
|
USB->ISTR &= ~USB_ISTR_SUSP;
|
||
|
USB->CNTR |= USB_CNTR_FSUSP;
|
||
|
notify_process(USB_EVENT_SUSPEND);
|
||
|
} else if (status & USB_ISTR_RESET) {
|
||
|
PRINTF("RESET\n");
|
||
|
USB->ISTR &= ~USB_ISTR_RESET;
|
||
|
usb_arch_reset();
|
||
|
notify_process(USB_EVENT_RESET);
|
||
|
}
|
||
|
}
|
||
|
|
||
|
void
|
||
|
usb_arch_toggle_SW_BUF_RX()
|
||
|
{
|
||
|
USB->EPR[2] = EPR_INVARIANT(USB->EPR[2]) | USB_EPxR_SW_BUF_RX;
|
||
|
}
|
||
|
|
||
|
int
|
||
|
usb_arch_send_pending(uint8_t ep_addr)
|
||
|
{
|
||
|
return usb_endpoints[EP_INDEX(ep_addr)].flags & USB_EP_FLAGS_TRANSMITTING;
|
||
|
}
|