313 lines
12 KiB
ArmAsm
313 lines
12 KiB
ArmAsm
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; Copyright (c) 2014, Analog Devices, Inc. All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted (subject to the limitations in the
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; disclaimer below) provided that the following conditions are met:
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;
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; - Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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;
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; - Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the
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; distribution.
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;
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; - Neither the name of Analog Devices, Inc. nor the names of its
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; contributors may be used to endorse or promote products derived
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; from this software without specific prior written permission.
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;
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; NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
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; GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
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; HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
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; WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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; BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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; OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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; IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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; Module : startup_ADuCRF101.s
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; Description : Cortex-M3 startup file - ADuCRF101 - RealView Version
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; Date : 14 January 2013
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; Version : v1.01
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; Changelog : v1.01 Added call to SystemInit
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; Changelog : v1.00 Initial
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IMPORT __use_no_semihosting_swi
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; Amount of memory (in bytes) allocated for Stack
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; Tailor this value to your application needs
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; <h> Stack Configuration
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; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem SPACE Stack_Size
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__initial_sp
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; <h> Heap Configuration
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; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size EQU 0x00000200
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem SPACE Heap_Size
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__heap_limit
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PRESERVE8
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THUMB
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; Vector Table Mapped to Address 0 at Reset
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AREA RESET, DATA, READONLY
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EXPORT __Vectors
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EXPORT __Vectors_End
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EXPORT __Vectors_Size
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__Vectors DCD __initial_sp ; Top of Stack
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DCD Reset_Handler ; Reset Handler
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DCD NMI_Handler ; The NMI handler
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DCD HardFault_Handler ; The hard fault handler
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DCD MemManage_Handler ; The MPU fault handler
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DCD BusFault_Handler ; The bus fault handler
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DCD UsageFault_Handler ; The usage fault handler
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD 0 ; Reserved
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DCD SVC_Handler ; SVCall handler
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DCD DebugMon_Handler ; Debug monitor handler
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DCD 0 ; Reserved
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DCD PendSV_Handler ; The PendSV handler
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DCD SysTick_Handler ; The SysTick handler
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; External Interrupts
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DCD WakeUp_Int_Handler ; Wake Up Timer [ 0]
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DCD Ext_Int0_Handler ; External Interrupt 0 [ 1]
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DCD Ext_Int1_Handler ; External Interrupt 1 [ 2]
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DCD Ext_Int2_Handler ; External Interrupt 2 [ 3]
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DCD Ext_Int3_Handler ; External Interrupt 3 [ 4]
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DCD Ext_Int4_Handler ; External Interrupt 4 [ 5]
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DCD Ext_Int5_Handler ; External Interrupt 5 [ 6]
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DCD Ext_Int6_Handler ; External Interrupt 6 [ 7]
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DCD Ext_Int7_Handler ; External Interrupt 7 [ 8]
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DCD Ext_Int8_Handler ; External Interrupt 8 [ 9]
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DCD WDog_Tmr_Int_Handler ; Watchdog timer handler [10]
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DCD UnUsed_Handler ; Reserved [11]
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DCD GP_Tmr0_Int_Handler ; General purpose timer 0 [12]
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DCD GP_Tmr1_Int_Handler ; General purpose timer 1 [13]
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DCD ADC0_Int_Handler ; ADC Interrupt [14]
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DCD Flsh_Int_Handler ; Flash IRQ [15]
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DCD UART_Int_Handler ; UART0 [16]
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DCD SPI0_Int_Handler ; SPI 0 [17]
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DCD SPI1_Int_Handler ; SPI 1 [18]
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DCD I2C0_Slave_Int_Handler ; I2C0 Slave [19]
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DCD I2C0_Master_Int_Handler ; I2C0 Master [20]
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DCD UnUsed_Handler ; Reserved [21]
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DCD UnUsed_Handler ; Reserved [22]
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DCD DMA_Err_Int_Handler ; DMA Error interrupt [23]
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DCD DMA_SPI1_TX_Int_Handler ; DMA SPI1 TX [24]
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DCD DMA_SPI1_RX_Int_Handler ; DMA SPI1 RX [25]
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DCD DMA_UART_TX_Int_Handler ; DMA UART TX [26]
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DCD DMA_UART_RX_Int_Handler ; DMA UART RX [27]
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DCD DMA_I2C0_STX_Int_Handler ; DMA I2C0 Slave TX [28]
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DCD DMA_I2C0_SRX_Int_Handler ; DMA I2C0 Slave RX [29]
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DCD DMA_I2C0_MTX_Int_Handler ; DMA I2C0 Master TX [30]
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DCD DMA_I2C0_MRX_Int_Handler ; DMA I2C0 Master RX [31]
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DCD UnUsed_Handler ; Reserved [32]
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DCD UnUsed_Handler ; Reserved [33]
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DCD UnUsed_Handler ; Reserved [34]
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DCD DMA_ADC_Int_Handler ; DMA ADC [35]
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DCD DMA_SPI0_TX_Int_Handler ; DMA SPI0 TX [36]
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DCD DMA_SPI0_RX_Int_Handler ; DMA SPI0 RX [37]
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DCD PWMTrip_Int_Handler ; PWM Trip [38]
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DCD PWM0_Int_Handler ; PWM 0 [39]
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DCD PWM1_Int_Handler ; PWM 1 [40]
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DCD PWM2_Int_Handler ; PWM 2 [41]
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DCD PWM3_Int_Handler ; PWM 3 [42]
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DCD UnUsed_Handler ; Unused [43]
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__Vectors_End
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__Vectors_Size EQU __Vectors_End - __Vectors
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AREA |.text|, CODE, READONLY
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; Reset handler
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Reset_Handler PROC
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EXPORT Reset_Handler [WEAK]
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IMPORT SystemInit
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IMPORT __main
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LDR R0, =SystemInit ; Defined in system_ADuCRF101.c
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BLX R0
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LDR R0, =__main
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BX R0
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ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler PROC
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EXPORT NMI_Handler [WEAK]
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B .
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ENDP
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HardFault_Handler\
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PROC
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EXPORT HardFault_Handler [WEAK]
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B .
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ENDP
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MemManage_Handler\
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PROC
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EXPORT MemManage_Handler [WEAK]
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B .
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ENDP
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BusFault_Handler\
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PROC
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EXPORT BusFault_Handler [WEAK]
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B .
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ENDP
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UsageFault_Handler\
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PROC
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EXPORT UsageFault_Handler [WEAK]
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B .
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ENDP
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SVC_Handler PROC
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EXPORT SVC_Handler [WEAK]
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B .
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ENDP
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DebugMon_Handler\
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PROC
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EXPORT DebugMon_Handler [WEAK]
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B .
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ENDP
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PendSV_Handler PROC
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EXPORT PendSV_Handler [WEAK]
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B .
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ENDP
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SysTick_Handler PROC
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EXPORT SysTick_Handler [WEAK]
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B .
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ENDP
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Default_Handler PROC
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EXPORT WakeUp_Int_Handler [WEAK]
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EXPORT Ext_Int0_Handler [WEAK]
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EXPORT Ext_Int1_Handler [WEAK]
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EXPORT Ext_Int2_Handler [WEAK]
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EXPORT Ext_Int3_Handler [WEAK]
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EXPORT Ext_Int4_Handler [WEAK]
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EXPORT Ext_Int5_Handler [WEAK]
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EXPORT Ext_Int6_Handler [WEAK]
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EXPORT Ext_Int7_Handler [WEAK]
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EXPORT Ext_Int8_Handler [WEAK]
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EXPORT WDog_Tmr_Int_Handler [WEAK]
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EXPORT GP_Tmr0_Int_Handler [WEAK]
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EXPORT GP_Tmr1_Int_Handler [WEAK]
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EXPORT ADC0_Int_Handler [WEAK]
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EXPORT Flsh_Int_Handler [WEAK]
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EXPORT UART_Int_Handler [WEAK]
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EXPORT SPI0_Int_Handler [WEAK]
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EXPORT SPI1_Int_Handler [WEAK]
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EXPORT I2C0_Slave_Int_Handler [WEAK]
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EXPORT I2C0_Master_Int_Handler [WEAK]
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EXPORT DMA_Err_Int_Handler [WEAK]
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EXPORT DMA_SPI1_TX_Int_Handler [WEAK]
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EXPORT DMA_SPI1_RX_Int_Handler [WEAK]
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EXPORT DMA_UART_TX_Int_Handler [WEAK]
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EXPORT DMA_UART_RX_Int_Handler [WEAK]
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EXPORT DMA_I2C0_STX_Int_Handler [WEAK]
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EXPORT DMA_I2C0_SRX_Int_Handler [WEAK]
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EXPORT DMA_I2C0_MTX_Int_Handler [WEAK]
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EXPORT DMA_I2C0_MRX_Int_Handler [WEAK]
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EXPORT DMA_ADC_Int_Handler [WEAK]
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EXPORT DMA_SPI0_TX_Int_Handler [WEAK]
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EXPORT DMA_SPI0_RX_Int_Handler [WEAK]
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EXPORT PWMTrip_Int_Handler [WEAK]
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EXPORT PWM0_Int_Handler [WEAK]
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EXPORT PWM1_Int_Handler [WEAK]
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EXPORT PWM2_Int_Handler [WEAK]
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EXPORT PWM3_Int_Handler [WEAK]
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EXPORT UnUsed_Handler [WEAK]
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WakeUp_Int_Handler
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Ext_Int0_Handler
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Ext_Int1_Handler
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Ext_Int2_Handler
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Ext_Int3_Handler
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Ext_Int4_Handler
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Ext_Int5_Handler
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Ext_Int6_Handler
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Ext_Int7_Handler
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Ext_Int8_Handler
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WDog_Tmr_Int_Handler
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GP_Tmr0_Int_Handler
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GP_Tmr1_Int_Handler
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ADC0_Int_Handler
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Flsh_Int_Handler
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UART_Int_Handler
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SPI0_Int_Handler
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SPI1_Int_Handler
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I2C0_Slave_Int_Handler
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I2C0_Master_Int_Handler
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DMA_Err_Int_Handler
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DMA_SPI1_TX_Int_Handler
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DMA_SPI1_RX_Int_Handler
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DMA_UART_TX_Int_Handler
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DMA_UART_RX_Int_Handler
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DMA_I2C0_STX_Int_Handler
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DMA_I2C0_SRX_Int_Handler
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DMA_I2C0_MTX_Int_Handler
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DMA_I2C0_MRX_Int_Handler
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DMA_ADC_Int_Handler
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DMA_SPI0_TX_Int_Handler
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DMA_SPI0_RX_Int_Handler
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PWMTrip_Int_Handler
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PWM0_Int_Handler
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PWM1_Int_Handler
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PWM2_Int_Handler
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PWM3_Int_Handler
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UnUsed_Handler
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B .
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ENDP
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ALIGN
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;*******************************************************************************
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; User Stack and Heap initialization
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;*******************************************************************************
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IF :DEF:__MICROLIB
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EXPORT __initial_sp
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EXPORT __heap_base
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EXPORT __heap_limit
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ELSE
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IMPORT __use_two_region_memory
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EXPORT __user_initial_stackheap
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__user_initial_stackheap
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LDR R0, = Heap_Mem
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LDR R1, =(Stack_Mem + Stack_Size)
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LDR R2, = (Heap_Mem + Heap_Size)
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LDR R3, = Stack_Mem
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BX LR
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ALIGN
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ENDIF
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END
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