344 lines
12 KiB
C
344 lines
12 KiB
C
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/*
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* Copyright (c) 2015, Zolertia - http://www.zolertia.com
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*---------------------------------------------------------------------------*/
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/**
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* \addtogroup cc2538-pwm-driver
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* @{
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*
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* \file
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* Driver for the CC2538 PWM
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*
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* \author
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* Javier Sanchez <jsanchez@zolertia.com>
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* Antonio Lignan <alinan@zolertia.com>
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*/
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/*---------------------------------------------------------------------------*/
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#include "contiki.h"
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#include "dev/ioc.h"
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#include "dev/gpio.h"
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#include "dev/sys-ctrl.h"
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#include "dev/pwm.h"
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#include <stdio.h>
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#include <stdlib.h>
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/*---------------------------------------------------------------------------*/
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#define DEBUG 0
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#if DEBUG
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#define PRINTF(...) printf(__VA_ARGS__)
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#else
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#define PRINTF(...)
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#endif
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/*---------------------------------------------------------------------------*/
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#define PWM_GPTIMER_NUM_TO_BASE(x) ((GPT_0_BASE) + ((x) << 12))
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/*---------------------------------------------------------------------------*/
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static uint8_t
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pwm_configured(uint8_t timer, uint8_t ab)
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{
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uint8_t offset;
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uint32_t gpt_base;
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gpt_base = PWM_GPTIMER_NUM_TO_BASE(timer);
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offset = (ab) ? 4 : 0;
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if((REG(gpt_base + GPTIMER_TAMR + offset) & GPTIMER_TAMR_TAAMS) &&
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(REG(gpt_base + GPTIMER_TAMR + offset) & GPTIMER_TAMR_TAMR_PERIODIC)) {
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return 1;
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}
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return 0;
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}
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/*---------------------------------------------------------------------------*/
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int8_t
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pwm_enable(uint32_t freq, uint8_t duty, uint8_t timer, uint8_t ab)
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{
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uint8_t offset = 0;
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uint32_t interval_load, duty_count, copy;
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uint32_t gpt_base, gpt_en, gpt_dir;
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if((freq < PWM_FREQ_MIN) || (freq > PWM_FREQ_MAX) ||
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(duty < PWM_DUTY_MIN) || (duty > PWM_DUTY_MAX) ||
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(timer > PWM_TIMER_MAX) || (timer < PWM_TIMER_MIN)) {
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PRINTF("PWM: Invalid PWM settings\n");
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return PWM_ERROR;
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}
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/* GPT0 timer A is used for clock_delay_usec() in clock.c */
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if((ab == PWM_TIMER_A) && (timer == PWM_TIMER_0)) {
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PRINTF("PWM: GPT0 (timer A) is reserved for clock_delay_usec()\n");
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return PWM_ERROR;
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}
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PRINTF("PWM: F%08luHz: %u%% on GPT%u-%u\n", freq, duty, timer, ab);
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gpt_base = PWM_GPTIMER_NUM_TO_BASE(timer);
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gpt_en = GPTIMER_CTL_TAEN;
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gpt_dir = GPTIMER_CTL_TAPWML;
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if(ab == PWM_TIMER_B) {
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offset = 4;
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gpt_en = GPTIMER_CTL_TBEN;
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gpt_dir = GPTIMER_CTL_TBPWML;
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}
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PRINTF("PWM: GPT_x_BASE 0x%08lX (%u)\n", gpt_base, offset);
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/* Restore later, ensure GPTIMER_CTL_TxEN and GPTIMER_CTL_TxPWML are clear */
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copy = REG(gpt_base + GPTIMER_CTL);
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copy &= ~(gpt_en | gpt_dir);
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/* Enable module clock for the GPTx in Active mode */
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REG(SYS_CTRL_RCGCGPT) |= (SYS_CTRL_RCGCGPT_GPT0 << timer);
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/* Enable module clock for the GPTx in Sleep mode */
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REG(SYS_CTRL_SCGCGPT) |= (SYS_CTRL_SCGCGPT_GPT0 << timer);
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/* Enable module clock for the GPTx in PM0, in PM1 and below this doesn't matter */
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REG(SYS_CTRL_DCGCGPT) |= (SYS_CTRL_DCGCGPT_GPT0 << timer);
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/* Stop the timer */
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REG(gpt_base + GPTIMER_CTL) = 0;
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/* Use 16-bit timer */
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REG(gpt_base + GPTIMER_CFG) = PWM_GPTIMER_CFG_SPLIT_MODE;
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/* Configure PWM mode */
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REG(gpt_base + GPTIMER_TAMR + offset) = 0;
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REG(gpt_base + GPTIMER_TAMR + offset) |= GPTIMER_TAMR_TAAMS;
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REG(gpt_base + GPTIMER_TAMR + offset) |= GPTIMER_TAMR_TAMR_PERIODIC;
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/* If the duty cycle is zero, leave the GPTIMER configured as PWM to pass a next
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* configured check, but do nothing else */
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if(!duty) {
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REG(gpt_base + GPTIMER_CTL) |= (copy | gpt_dir);
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return PWM_SUCCESS;
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}
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/* Get the peripheral clock and equivalent deassert count */
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interval_load = sys_ctrl_get_io_clock() / freq;
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duty_count = ((interval_load * duty) + 1) / 100;
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PRINTF("PWM: IO %luHz: %lu %lu\n", sys_ctrl_get_io_clock(),
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interval_load, duty_count);
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/* Set the start value (period), count down */
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REG(gpt_base + GPTIMER_TAILR + offset) = ((uint16_t *)&interval_load)[0] - 1;
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/* Set the deassert period */
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REG(gpt_base + GPTIMER_TAMATCHR + offset) = ((uint16_t *)&duty_count)[0] - 1;
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/* Set the prescaler if required */
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REG(gpt_base + GPTIMER_TAPR + offset) = ((uint8_t *)&interval_load)[2];
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/* Set the prescaler match if required */
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REG(gpt_base + GPTIMER_TAPMR + offset) = ((uint8_t *)&duty_count)[2];
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/* Restore the register content */
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REG(gpt_base + GPTIMER_CTL) |= (copy | gpt_dir);
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PRINTF("PWM: TnILR %lu ", REG(gpt_base + (GPTIMER_TAILR + offset)));
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PRINTF("TnMATCHR %lu ", REG(gpt_base + (GPTIMER_TAMATCHR + offset)));
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PRINTF("TnPR %lu ", REG(gpt_base + (GPTIMER_TAPR + offset)));
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PRINTF("TnPMR %lu\n", REG(gpt_base + (GPTIMER_TAPMR + offset)));
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return PWM_SUCCESS;
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}
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/*---------------------------------------------------------------------------*/
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int8_t
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pwm_stop(uint8_t timer, uint8_t ab, uint8_t port, uint8_t pin, uint8_t state)
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{
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uint32_t gpt_base, gpt_dis;
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if((ab > PWM_TIMER_B) || (timer < PWM_TIMER_MIN) ||
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(timer > PWM_TIMER_MAX)) {
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PRINTF("PWM: Invalid PWM values\n");
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return PWM_ERROR;
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}
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if(!pwm_configured(timer, ab)) {
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PRINTF("PWM: GPTn not configured as PWM\n");
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return PWM_ERROR;
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}
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/* CC2538 has 4 ports (A-D) and up to 8 pins (0-7) */
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if((port > GPIO_D_NUM) || (pin > 7)) {
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PRINTF("PWM: Invalid pin/port settings\n");
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return PWM_ERROR;
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}
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/* CC2538 has 4 ports (A-D) and up to 8 pins (0-7) */
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if((state != PWM_OFF_WHEN_STOP) && (state != PWM_ON_WHEN_STOP)) {
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PRINTF("PWM: Invalid pin state when PWM is halt\n");
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return PWM_ERROR;
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}
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gpt_base = PWM_GPTIMER_NUM_TO_BASE(timer);
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gpt_dis = (ab == PWM_TIMER_B) ? GPTIMER_CTL_TBEN : GPTIMER_CTL_TAEN;
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REG(gpt_base + GPTIMER_CTL) &= ~gpt_dis;
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/* Configure the port/pin as GPIO, input */
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ioc_set_over(port, pin, IOC_OVERRIDE_DIS);
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GPIO_SOFTWARE_CONTROL(GPIO_PORT_TO_BASE(port), GPIO_PIN_MASK(pin));
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GPIO_SET_OUTPUT(GPIO_PORT_TO_BASE(port), GPIO_PIN_MASK(pin));
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if(state) {
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GPIO_SET_PIN(GPIO_PORT_TO_BASE(port), GPIO_PIN_MASK(pin));
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} else {
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GPIO_CLR_PIN(GPIO_PORT_TO_BASE(port), GPIO_PIN_MASK(pin));
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}
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PRINTF("PWM: OFF -> Timer %u (%u)\n", timer, ab);
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return PWM_SUCCESS;
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}
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/*---------------------------------------------------------------------------*/
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int8_t
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pwm_start(uint8_t timer, uint8_t ab, uint8_t port, uint8_t pin)
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{
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uint32_t gpt_base, gpt_en, gpt_sel;
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if((ab > PWM_TIMER_B) || (timer < PWM_TIMER_MIN) ||
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(timer > PWM_TIMER_MAX)) {
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PRINTF("PWM: Invalid PWM values\n");
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return PWM_ERROR;
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}
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if(!pwm_configured(timer, ab)) {
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PRINTF("PWM: GPTn not configured as PWM\n");
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return PWM_ERROR;
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}
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/* CC2538 has 4 ports (A-D) and up to 8 pins (0-7) */
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if((port > GPIO_D_NUM) || (pin > 7)) {
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PRINTF("PWM: Invalid pin/port settings\n");
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return PWM_ERROR;
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}
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/* Map to given port/pin */
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gpt_sel = IOC_PXX_SEL_GPT0_ICP1 + (timer * 2);
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if(ab == PWM_TIMER_B) {
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gpt_sel++;
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}
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ioc_set_sel(port, pin, gpt_sel);
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ioc_set_over(port, pin, IOC_OVERRIDE_OE);
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GPIO_PERIPHERAL_CONTROL(GPIO_PORT_TO_BASE(port), GPIO_PIN_MASK(pin));
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gpt_base = PWM_GPTIMER_NUM_TO_BASE(timer);
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gpt_en = (ab == PWM_TIMER_B) ? GPTIMER_CTL_TBEN : GPTIMER_CTL_TAEN;
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REG(gpt_base + GPTIMER_CTL) |= gpt_en;
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PRINTF("PWM: ON -> Timer %u (%u) IOC_PXX_SEL_GPTx_IPCx 0x%08lX\n", timer, ab,
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gpt_sel);
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return PWM_SUCCESS;
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}
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/*---------------------------------------------------------------------------*/
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int8_t
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pwm_set_direction(uint8_t timer, uint8_t ab, uint8_t dir)
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{
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uint32_t gpt_base, gpt_dir;
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if((ab > PWM_TIMER_B) || (timer < PWM_TIMER_MIN) ||
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(timer > PWM_TIMER_MAX) || (dir > PWM_SIGNAL_INVERTED)) {
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PRINTF("PWM: Invalid PWM values\n");
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return PWM_ERROR;
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}
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if(!pwm_configured(timer, ab)) {
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PRINTF("PWM: GPTn not configured as PWM\n");
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return PWM_ERROR;
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}
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gpt_base = PWM_GPTIMER_NUM_TO_BASE(timer);
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gpt_dir = (ab == PWM_TIMER_B) ? GPTIMER_CTL_TBPWML : GPTIMER_CTL_TAPWML;
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if(dir) {
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REG(gpt_base + GPTIMER_CTL) |= gpt_dir;
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} else {
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REG(gpt_base + GPTIMER_CTL) &= ~gpt_dir;
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}
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PRINTF("PWM: Signal direction (%u) -> Timer %u (%u)\n", dir, timer, ab);
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return PWM_SUCCESS;
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}
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/*---------------------------------------------------------------------------*/
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int8_t
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pwm_toggle_direction(uint8_t timer, uint8_t ab)
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{
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uint32_t gpt_base, gpt_dir;
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if((ab > PWM_TIMER_B) || (timer < PWM_TIMER_MIN) ||
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(timer > PWM_TIMER_MAX)) {
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PRINTF("PWM: Invalid PWM values\n");
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return PWM_ERROR;
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}
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if(!pwm_configured(timer, ab)) {
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PRINTF("PWM: GPTn not configured as PWM\n");
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return PWM_ERROR;
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}
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gpt_base = PWM_GPTIMER_NUM_TO_BASE(timer);
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gpt_dir = (ab == PWM_TIMER_B) ? GPTIMER_CTL_TBPWML : GPTIMER_CTL_TAPWML;
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if(REG(gpt_base + GPTIMER_CTL) & gpt_dir) {
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REG(gpt_base + GPTIMER_CTL) &= ~gpt_dir;
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} else {
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REG(gpt_base + GPTIMER_CTL) |= gpt_dir;
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}
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PRINTF("PWM: direction toggled -> Timer %u (%u)\n", timer, ab);
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return PWM_SUCCESS;
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}
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/*---------------------------------------------------------------------------*/
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int8_t
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pwm_disable(uint8_t timer, uint8_t ab, uint8_t port, uint8_t pin)
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{
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uint32_t gpt_base;
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uint8_t offset = (ab == PWM_TIMER_B) ? 4 : 0;
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gpt_base = PWM_GPTIMER_NUM_TO_BASE(timer);
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if((ab > PWM_TIMER_B) || (timer < PWM_TIMER_MIN) ||
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(timer > PWM_TIMER_MAX)) {
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PRINTF("PWM: Invalid PWM values\n");
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return PWM_ERROR;
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}
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/* CC2538 has 4 ports (A-D) and up to 8 pins (0-7) */
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if((port > GPIO_D_NUM) || (pin > 7)) {
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PRINTF("PWM: Invalid pin/port settings\n");
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return PWM_ERROR;
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}
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if(!pwm_configured(timer, ab)) {
|
||
|
|
PRINTF("PWM: GPTn not configured as PWM\n");
|
||
|
|
return PWM_ERROR;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Stop the PWM */
|
||
|
|
pwm_stop(timer, ab, port, pin, PWM_OFF_WHEN_STOP);
|
||
|
|
/* Disable the PWM mode */
|
||
|
|
REG(gpt_base + (GPTIMER_TAMR + offset)) = 0;
|
||
|
|
/* Restart the interval load and deassert values */
|
||
|
|
REG(gpt_base + (GPTIMER_TAILR + offset)) = 0;
|
||
|
|
REG(gpt_base + (GPTIMER_TAMATCHR + offset)) = 0;
|
||
|
|
|
||
|
|
/* Configure the port/pin as GPIO, input */
|
||
|
|
ioc_set_over(port, pin, IOC_OVERRIDE_DIS);
|
||
|
|
GPIO_SOFTWARE_CONTROL(GPIO_PORT_TO_BASE(port), GPIO_PIN_MASK(pin));
|
||
|
|
GPIO_SET_INPUT(GPIO_PORT_TO_BASE(port), GPIO_PIN_MASK(pin));
|
||
|
|
|
||
|
|
return PWM_SUCCESS;
|
||
|
|
}
|
||
|
|
/*---------------------------------------------------------------------------*/
|
||
|
|
/** @} */
|