2015-09-21 18:49:31 +02:00
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/*
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* Copyright (c) 2015, SICS Swedish ICT.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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*/
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/**
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* \file
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* TSCH configuration
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* \author
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* Simon Duquennoy <simonduq@sics.se>
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*/
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#ifndef __TSCH_CONF_H__
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#define __TSCH_CONF_H__
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/********** Includes **********/
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#include "contiki.h"
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/******** Configuration *******/
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/* Default IEEE 802.15.4e hopping sequences, obtained from https://gist.github.com/twatteyne/2e22ee3c1a802b685695 */
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/* 16 channels, sequence length 16 */
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#define TSCH_HOPPING_SEQUENCE_16_16 (uint8_t[]){ 16, 17, 23, 18, 26, 15, 25, 22, 19, 11, 12, 13, 24, 14, 20, 21 }
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/* 4 channels, sequence length 16 */
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#define TSCH_HOPPING_SEQUENCE_4_16 (uint8_t[]){ 20, 26, 25, 26, 15, 15, 25, 20, 26, 15, 26, 25, 20, 15, 20, 25 }
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/* 4 channels, sequence length 4 */
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#define TSCH_HOPPING_SEQUENCE_4_4 (uint8_t[]){ 15, 25, 26, 20 }
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/* 1 channel, sequence length 1 */
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#define TSCH_HOPPING_SEQUENCE_1_1 (uint8_t[]){ 20 }
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/* Default hopping sequence, used in case hopping sequence ID == 0 */
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#ifdef TSCH_CONF_DEFAULT_HOPPING_SEQUENCE
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#define TSCH_DEFAULT_HOPPING_SEQUENCE TSCH_CONF_DEFAULT_HOPPING_SEQUENCE
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#else
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#define TSCH_DEFAULT_HOPPING_SEQUENCE TSCH_HOPPING_SEQUENCE_4_4
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#endif
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/* Hopping sequence used for joining (scan channels) */
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#ifdef TSCH_CONF_JOIN_HOPPING_SEQUENCE
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#define TSCH_JOIN_HOPPING_SEQUENCE TSCH_CONF_JOIN_HOPPING_SEQUENCE
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#else
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#define TSCH_JOIN_HOPPING_SEQUENCE TSCH_DEFAULT_HOPPING_SEQUENCE
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#endif
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/* Maximum length of the TSCH channel hopping sequence. Must be greater or
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* equal to the length of TSCH_DEFAULT_HOPPING_SEQUENCE. */
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#ifdef TSCH_CONF_HOPPING_SEQUENCE_MAX_LEN
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#define TSCH_HOPPING_SEQUENCE_MAX_LEN TSCH_CONF_HOPPING_SEQUENCE_MAX_LEN
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#else
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#define TSCH_HOPPING_SEQUENCE_MAX_LEN 16
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#endif
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/* Timeslot timing */
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#ifndef TSCH_CONF_DEFAULT_TIMESLOT_LENGTH
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#define TSCH_CONF_DEFAULT_TIMESLOT_LENGTH 10000
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#endif /* TSCH_CONF_DEFAULT_TIMESLOT_LENGTH */
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/* Configurable Rx guard time is micro-seconds */
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#ifndef TSCH_CONF_RX_WAIT
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#define TSCH_CONF_RX_WAIT 2200
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#endif /* TSCH_CONF_RX_WAIT */
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/* The default timeslot timing in the standard is a guard time of
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* 2200 us, a Tx offset of 2120 us and a Rx offset of 1120 us.
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* As a result, the listening device has a guard time not centered
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* on the expected Tx time. This is to be fixed in the next iteration
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* of the standard. This can be enabled with:
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* #define TSCH_DEFAULT_TS_TX_OFFSET 2120
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* #define TSCH_DEFAULT_TS_RX_OFFSET 1120
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* #define TSCH_DEFAULT_TS_RX_WAIT 2200
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*
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* Instead, we align the Rx guard time on expected Tx time. The Rx
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* guard time is user-configurable with TSCH_CONF_RX_WAIT.
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* (TS_TX_OFFSET - (TS_RX_WAIT / 2)) instead */
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#if TSCH_CONF_DEFAULT_TIMESLOT_LENGTH == 10000
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/* Default timeslot timing as per IEEE 802.15.4e */
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#define TSCH_DEFAULT_TS_CCA_OFFSET 1800
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#define TSCH_DEFAULT_TS_CCA 128
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#define TSCH_DEFAULT_TS_TX_OFFSET 2120
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#define TSCH_DEFAULT_TS_RX_OFFSET (TSCH_DEFAULT_TS_TX_OFFSET - (TSCH_CONF_RX_WAIT / 2))
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#define TSCH_DEFAULT_TS_RX_ACK_DELAY 800
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#define TSCH_DEFAULT_TS_TX_ACK_DELAY 1000
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#define TSCH_DEFAULT_TS_RX_WAIT TSCH_CONF_RX_WAIT
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#define TSCH_DEFAULT_TS_ACK_WAIT 400
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#define TSCH_DEFAULT_TS_RX_TX 192
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#define TSCH_DEFAULT_TS_MAX_ACK 2400
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#define TSCH_DEFAULT_TS_MAX_TX 4256
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#define TSCH_DEFAULT_TS_TIMESLOT_LENGTH 10000
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#elif TSCH_CONF_DEFAULT_TIMESLOT_LENGTH == 15000
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/* Default timeslot timing for platfroms requiring 15ms slots */
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#define TSCH_DEFAULT_TS_CCA_OFFSET 1800
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#define TSCH_DEFAULT_TS_CCA 128
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#define TSCH_DEFAULT_TS_TX_OFFSET 4000
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#define TSCH_DEFAULT_TS_RX_OFFSET (TSCH_DEFAULT_TS_TX_OFFSET - (TSCH_CONF_RX_WAIT / 2))
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#define TSCH_DEFAULT_TS_RX_ACK_DELAY 3600
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#define TSCH_DEFAULT_TS_TX_ACK_DELAY 4000
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#define TSCH_DEFAULT_TS_RX_WAIT TSCH_CONF_RX_WAIT
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#define TSCH_DEFAULT_TS_ACK_WAIT 800
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#define TSCH_DEFAULT_TS_RX_TX 2072
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#define TSCH_DEFAULT_TS_MAX_ACK 2400
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#define TSCH_DEFAULT_TS_MAX_TX 4256
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#define TSCH_DEFAULT_TS_TIMESLOT_LENGTH 15000
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2016-03-28 14:39:16 +02:00
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#elif TSCH_CONF_DEFAULT_TIMESLOT_LENGTH == 65000U
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2015-09-21 18:49:31 +02:00
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/* 65ms timeslot, i.e. nearly the max length allowed by standard (16-bit unsigned in micro-seconds).
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* Useful for running link-layer security on sky or z1 in Cooja, where only S/W security is supported.
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* Note: this slot timing would require a total of 120ms. If a slot overlaps with the next active slot,
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* the latter will be skipped.
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* This configuration is mostly a work-around to test link-layer security in Cooja, it is recommended
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* to use it with a 6TiSCH minimal schedule of length >= 2. */
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#define TSCH_DEFAULT_TS_CCA_OFFSET 1800
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#define TSCH_DEFAULT_TS_CCA 128
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#define TSCH_DEFAULT_TS_TX_OFFSET 52000
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#define TSCH_DEFAULT_TS_RX_OFFSET (TSCH_DEFAULT_TS_TX_OFFSET - (TSCH_CONF_RX_WAIT / 2))
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#define TSCH_DEFAULT_TS_RX_ACK_DELAY 58600
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#define TSCH_DEFAULT_TS_TX_ACK_DELAY 59000
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#define TSCH_DEFAULT_TS_RX_WAIT TSCH_CONF_RX_WAIT
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#define TSCH_DEFAULT_TS_ACK_WAIT 800
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#define TSCH_DEFAULT_TS_RX_TX 2072
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#define TSCH_DEFAULT_TS_MAX_ACK 2400
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#define TSCH_DEFAULT_TS_MAX_TX 4256
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#define TSCH_DEFAULT_TS_TIMESLOT_LENGTH 65000
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#else
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#error "TSCH: Unsupported default timeslot length"
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#endif
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/* A custom feature allowing upper layers to assign packets to
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* a specific slotframe and link */
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#ifdef TSCH_CONF_WITH_LINK_SELECTOR
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#define TSCH_WITH_LINK_SELECTOR TSCH_CONF_WITH_LINK_SELECTOR
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#else /* TSCH_CONF_WITH_LINK_SELECTOR */
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#define TSCH_WITH_LINK_SELECTOR 0
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#endif /* TSCH_CONF_WITH_LINK_SELECTOR */
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2015-11-11 17:34:33 +01:00
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/* Estimate the drift of the time-source neighbor and compensate for it? */
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#ifdef TSCH_CONF_ADAPTIVE_TIMESYNC
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#define TSCH_ADAPTIVE_TIMESYNC TSCH_CONF_ADAPTIVE_TIMESYNC
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#else
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#define TSCH_ADAPTIVE_TIMESYNC 0
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#endif
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2016-03-08 15:48:16 +01:00
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/* HW frame filtering enabled */
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#ifdef TSCH_CONF_HW_FRAME_FILTERING
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2016-03-31 11:24:57 +02:00
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#define TSCH_HW_FRAME_FILTERING TSCH_CONF_HW_FRAME_FILTERING
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2016-03-08 15:48:16 +01:00
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#else /* TSCH_CONF_HW_FRAME_FILTERING */
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2016-04-05 17:12:48 +02:00
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#define TSCH_HW_FRAME_FILTERING 1
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2016-03-31 11:24:57 +02:00
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#endif /* TSCH_CONF_HW_FRAME_FILTERING */
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2016-03-08 15:48:16 +01:00
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2015-09-21 18:49:31 +02:00
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#endif /* __TSCH_CONF_H__ */
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