2012-12-17 09:14:23 +01:00
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/*
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* Contiki PIC32 Port project
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*
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* Copyright (c) 2012,
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* Scuola Superiore Sant'Anna (http://www.sssup.it) and
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* Consorzio Nazionale Interuniversitario per le Telecomunicazioni
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* (http://www.cnit.it).
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/**
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* \addtogroup pic32 PIC32 Contiki Port
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*
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* @{
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*/
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/**
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* \file pic32_uart.c
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* \brief UART Interface for PIC32MX (pic32mx795f512l)
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* \author Giovanni Pellerano <giovanni.pellerano@evilaliv3.org>
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* \date 2012-03-21
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*/
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/*
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* PIC32MX795F512L - Specific Functions
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*
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* All the functions in this part of the file are specific for the
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* pic32mx795f512l that is characterized by registers' name that differ from
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* the 3xx and 4xx families of the pic32mx.
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*/
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#define __UART_CODE_TEST__ 0
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#if __UART_CODE_TEST__
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#define __USE_UART__ 1
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#define __USE_UART_PORT1A__ 1
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#define __USE_UART_PORT1B__ 1
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#define __USE_UART_PORT2A__ 1
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#define __USE_UART_PORT2B__ 1
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#define __USE_UART_PORT3A__ 1
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#define __USE_UART_PORT3B__ 1
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#endif /* __UART_CODE_TEST__ */
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#ifdef __USE_UART__
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#include <pic32_uart.h>
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#include <pic32_clock.h>
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#include <pic32_irq.h>
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#include <p32xxxx.h>
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#include "contiki.h"
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#include "lib/ringbuf.h"
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/*---------------------------------------------------------------------------*/
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#define UART_PORT_INIT_XA(XX, YY, ZZ) \
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int8_t \
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pic32_uart##XX##A_init(uint32_t baudrate, uint16_t byte_format) \
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{ \
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/* Disable Interrupts: RX, TX, ERR */ \
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IEC##ZZ##CLR = _IEC##ZZ##_U##XX##ARXIE_MASK; \
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IFS##ZZ##CLR = _IFS##ZZ##_U##XX##AEIF_MASK | _IFS##ZZ##_U##XX##ATXIF_MASK | _IFS##ZZ##_U##XX##ARXIF_MASK; \
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\
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/* Clear thant Set Pri and Sub priority */ \
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IPC##YY##CLR = _IPC##YY##_U##XX##AIP_MASK | _IPC##YY##_U##XX##AIS_MASK; \
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IPC##YY##SET = (6 << _IPC##YY##_U##XX##AIP_POSITION) | (0 << _IPC##YY##_U##XX##AIS_POSITION); \
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\
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/* Mode Register Reset (this also stops UART) */ \
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U##XX##AMODE = 0; \
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\
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/* Use BRGH = 1: 4 divisor */ \
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U##XX##AMODESET = _U##XX##AMODE_BRGH_MASK; \
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U##XX##ABRG = pic32_clock_calculate_brg(4, baudrate); \
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\
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U##XX##AMODESET = byte_format & 0x07; /* Number of bit, Parity and Stop bits */ \
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\
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/* Status bits */ \
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U##XX##ASTA = 0; /* TX & RX interrupt modes */ \
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U##XX##ASTASET = _U##XX##ASTA_UTXEN_MASK | _U##XX##ASTA_URXEN_MASK; /* Enable TX, RX */ \
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\
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IEC##ZZ##SET = _IEC##ZZ##_U##XX##ARXIE_MASK; \
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\
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/* Enable UART port */ \
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U##XX##AMODESET = _U##XX##AMODE_UARTEN_MASK; \
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\
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return UART_NO_ERROR; \
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}
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/*---------------------------------------------------------------------------*/
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#define UART_PORT_INIT_XB(XX, YY, ZZ) \
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int8_t \
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pic32_uart##XX##B_init(uint32_t baudrate, uint16_t byte_format) \
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{ \
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/* Disable Interrupts: RX, TX, ERR */ \
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IEC##ZZ##CLR = _IEC##ZZ##_U##XX##BRXIE_MASK; \
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IFS##ZZ##CLR = _IFS##ZZ##_U##XX##BEIF_MASK | _IFS##ZZ##_U##XX##BTXIF_MASK | _IFS##ZZ##_U##XX##BRXIF_MASK; \
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\
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/* Clear thant Set Pri and Sub priority */ \
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IPC##YY##CLR = _IPC##YY##_U##XX##BIP_MASK | _IPC##YY##_U##XX##BIS_MASK; \
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IPC##YY##SET = (6 << _IPC##YY##_U##XX##BIP_POSITION) | (0 << _IPC##YY##_U##XX##BIS_POSITION); \
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\
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/* Mode Register Reset (this also stops UART) */ \
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U##XX##BMODE = 0; \
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\
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/* Use BRGH = 1: 4 divisor */ \
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U##XX##BMODESET = _U##XX##BMODE_BRGH_MASK; \
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U##XX##BBRG = pic32_clock_calculate_brg(4, baudrate); \
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\
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U##XX##BMODESET = byte_format & 0x07; /* Number of bit, Parity and Stop bits */ \
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\
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/* Status bits */ \
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U##XX##BSTA = 0; /* TX & RX interrupt modes */ \
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U##XX##BSTASET = _U##XX##BSTA_UTXEN_MASK | _U##XX##BSTA_URXEN_MASK; /* Enable TX, RX */ \
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\
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IEC##ZZ##SET = _IEC##ZZ##_U##XX##BRXIE_MASK; \
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\
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/* Enable UART port */ \
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U##XX##BMODESET = _U##XX##BMODE_UARTEN_MASK; \
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\
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return UART_NO_ERROR; \
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}
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/*---------------------------------------------------------------------------*/
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#define UART_PORT(XX, YY) \
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\
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int8_t \
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pic32_uart##XX##_write(uint8_t data) \
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{ \
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2012-12-21 12:36:29 +01:00
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while(U##XX##STAbits.UTXBF); \
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2012-12-17 09:14:23 +01:00
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U##XX##TXREG = data; \
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2012-12-21 12:36:29 +01:00
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while(!U##XX##STAbits.TRMT); \
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2012-12-17 09:14:23 +01:00
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\
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return UART_NO_ERROR; \
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}
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/*---------------------------------------------------------------------------*/
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#ifdef __USE_UART_PORT1A__
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UART_PORT(1A, 0)
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UART_PORT_INIT_XA(1, 6, 0)
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#endif /* __USE_UART_PORT1A__ */
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#ifdef __USE_UART_PORT1B__
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UART_PORT(1B, 2)
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UART_PORT_INIT_XB(1, 12, 2)
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#endif /* __USE_UART_PORT1B__ */
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#ifdef __USE_UART_PORT2A__
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UART_PORT(2A, 1)
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UART_PORT_INIT_XA(2, 7, 1)
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#endif /* __USE_UART_PORT2A__ */
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#ifdef __USE_UART_PORT2B__
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UART_PORT(2B, 2)
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UART_PORT_INIT_XB(2, 12, 2)
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#endif /* __USE_UART_PORT2B__ */
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#ifdef __USE_UART_PORT3A__
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UART_PORT(3A, 1)
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UART_PORT_INIT_XA(3, 8, 1)
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#endif /* __USE_UART_PORT3A__ */
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#ifdef __USE_UART_PORT3B__
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UART_PORT(3B, 2)
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UART_PORT_INIT_XB(3, 12, 2)
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#endif /* __USE_UART_PORT3B__ */
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#endif /* __USE_UART__ */
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/** @} */
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