2012-01-18 16:27:59 +01:00
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/*
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* Copyright (c) 2005, Swedish Institute of Computer Science
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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*/
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#include "contiki-conf.h"
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#include "sys/energest.h"
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#include "sys/clock.h"
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#include "sys/etimer.h"
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#include "rtimer-arch.h"
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2012-03-08 22:39:53 +01:00
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#include "isr_compat.h"
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2012-01-18 16:27:59 +01:00
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#include "dev/leds.h"
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#define INTERVAL (RTIMER_ARCH_SECOND / CLOCK_SECOND)
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#define MAX_TICKS (~((clock_time_t)0) / 2)
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2014-08-21 18:10:53 +02:00
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#define CLOCK_LT(a, b) ((int16_t)((a)-(b)) < 0)
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2012-01-18 16:27:59 +01:00
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static volatile unsigned long seconds;
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static volatile clock_time_t count = 0;
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/* last_tar is used for calculating clock_fine, last_ccr might be better? */
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static unsigned short last_tar = 0;
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/*---------------------------------------------------------------------------*/
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2014-08-21 18:10:53 +02:00
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static inline uint16_t
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read_tar(void)
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{
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/* Same as clock_counter(), but can be inlined */
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uint16_t t1, t2;
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do {
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t1 = TA1R;
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t2 = TA1R;
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} while(t1 != t2);
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return t1;
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}
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/*---------------------------------------------------------------------------*/
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2012-03-08 22:39:53 +01:00
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ISR(TIMER1_A1, timera1)
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2012-01-18 16:27:59 +01:00
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{
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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if(TA1IV == 2) {
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/* HW timer bug fix: Interrupt handler called before TR==CCR.
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* Occurrs when timer state is toggled between STOP and CONT. */
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while(TA1CTL & MC1 && TA1CCR1 - TA1R == 1);
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2014-08-21 18:10:53 +02:00
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last_tar = read_tar();
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2012-01-18 16:27:59 +01:00
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/* Make sure interrupt time is future */
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2014-08-21 18:10:53 +02:00
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while(!CLOCK_LT(last_tar, TA1CCR1)) {
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2012-01-18 16:27:59 +01:00
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/* TACTL &= ~MC1;*/
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TA1CCR1 += INTERVAL;
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/* TACTL |= MC1;*/
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++count;
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/* Make sure the CLOCK_CONF_SECOND is a power of two, to ensure
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that the modulo operation below becomes a logical and and not
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an expensive divide. Algorithm from Wikipedia:
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http://en.wikipedia.org/wiki/Power_of_two */
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#if (CLOCK_CONF_SECOND & (CLOCK_CONF_SECOND - 1)) != 0
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#error CLOCK_CONF_SECOND must be a power of two (i.e., 1, 2, 4, 8, 16, 32, 64, ...).
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#error Change CLOCK_CONF_SECOND in contiki-conf.h.
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#endif
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if(count % CLOCK_CONF_SECOND == 0) {
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++seconds;
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energest_flush();
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}
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2014-08-21 18:10:53 +02:00
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last_tar = read_tar();
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}
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2012-01-18 16:27:59 +01:00
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if(etimer_pending() &&
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(etimer_next_expiration_time() - count - 1) > MAX_TICKS) {
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etimer_request_poll();
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LPM4_EXIT;
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}
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}
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/* if(process_nevents() >= 0) {
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LPM4_EXIT;
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}*/
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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}
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/*---------------------------------------------------------------------------*/
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clock_time_t
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clock_time(void)
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{
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clock_time_t t1, t2;
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do {
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t1 = count;
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t2 = count;
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} while(t1 != t2);
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return t1;
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}
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/*---------------------------------------------------------------------------*/
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void
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clock_set(clock_time_t clock, clock_time_t fclock)
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{
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TA1R = fclock;
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TA1CCR1 = fclock + INTERVAL;
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count = clock;
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}
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/*---------------------------------------------------------------------------*/
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int
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clock_fine_max(void)
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{
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return INTERVAL;
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}
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/*---------------------------------------------------------------------------*/
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unsigned short
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clock_fine(void)
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{
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unsigned short t;
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/* Assign last_tar to local varible that can not be changed by interrupt */
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t = last_tar;
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/* perform calc based on t, TAR will not be changed during interrupt */
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return (unsigned short) (TA1R - t);
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}
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/*---------------------------------------------------------------------------*/
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void
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clock_init(void)
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{
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dint();
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/* Select SMCLK (2.4576MHz), clear TAR */
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/* TACTL = TASSEL1 | TACLR | ID_3; */
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/* Select ACLK 32768Hz clock, divide by 2 */
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/* TA1CTL = TASSEL0 | TACLR | ID_1; */
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#if INTERVAL==32768/CLOCK_SECOND
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TA1CTL = TASSEL0 | TACLR;
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#elif INTERVAL==16384/CLOCK_SECOND
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TA1CTL = TASSEL0 | TACLR | ID_1;
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#else
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#error NEED TO UPDATE clock.c to match interval!
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#endif
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/* Initialize ccr1 to create the X ms interval. */
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/* CCR1 interrupt enabled, interrupt occurs when timer equals CCR1. */
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TA1CCTL1 = CCIE;
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/* Interrupt after X ms. */
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TA1CCR1 = INTERVAL;
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/* Start Timer_A in continuous mode. */
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TA1CTL |= MC1;
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count = 0;
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/* Enable interrupts. */
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eint();
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Delay the CPU for a multiple of 2.83 us.
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*/
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void
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clock_delay(unsigned int i)
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{
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/*
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* This means that delay(i) will delay the CPU for CONST + 3x
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* cycles. On a 2.4756 CPU, this means that each i adds 1.22us of
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* delay.
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*
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* do {
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* --i;
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* } while(i > 0);
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*/
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#ifdef __IAR_SYSTEMS_ICC__
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asm("add #-1, r12");
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asm("jnz $-2");
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#else
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#ifdef __GNUC__
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asm("add #-1, r15");
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asm("jnz $-2");
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#else
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do {
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asm("nop");
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--i;
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} while(i > 0);
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#endif /* __GNUC__ */
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#endif /* __IAR_SYSTEMS_ICC__ */
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}
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/*---------------------------------------------------------------------------*/
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#ifdef __GNUC__
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void
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2012-06-04 17:41:12 +02:00
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__delay_cycles(unsigned long c)
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2012-01-18 16:27:59 +01:00
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{
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c /= 4;
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asm("add #-1, r15");
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asm("jnz $-2");
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}
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#endif /* __GNUC__ */
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/*---------------------------------------------------------------------------*/
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2015-02-15 21:41:54 +01:00
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/*
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2012-01-18 16:27:59 +01:00
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* Wait for a multiple of 10 ms.
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*
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*/
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void
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2012-04-09 21:49:53 +02:00
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clock_wait(clock_time_t i)
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2012-01-18 16:27:59 +01:00
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{
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clock_time_t start;
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start = clock_time();
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while(clock_time() - start < (clock_time_t)i);
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}
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/*---------------------------------------------------------------------------*/
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void
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clock_set_seconds(unsigned long sec)
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{
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}
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/*---------------------------------------------------------------------------*/
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unsigned long
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clock_seconds(void)
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{
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unsigned long t1, t2;
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do {
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t1 = seconds;
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t2 = seconds;
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} while(t1 != t2);
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return t1;
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}
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/*---------------------------------------------------------------------------*/
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rtimer_clock_t
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clock_counter(void)
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{
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return TA1R;
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}
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/*---------------------------------------------------------------------------*/
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