2010-02-26 20:21:46 +01:00
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#ifndef CONFIG_H
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#define CONFIG_H
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/* Baud rate */
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#define MOD 9999
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2010-03-10 00:23:40 +01:00
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/* 230400 bps, INC=767, MOD=9999, 24Mhz 16x samp */
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/* 115200 bps, INC=767, MOD=9999, 24Mhz 8x samp */
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#define INC 767
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/* 921600 bps, MOD=9999, 24Mhz 16x samp */
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//#define INC 3071
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#define SAMP UCON_SAMP_8X
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//#define SAMP UCON_SAMP_16X
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2010-02-26 20:21:46 +01:00
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/* use uart1 for console */
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#define uart_init uart1_init
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/* nvm-read */
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2010-03-20 03:12:25 +01:00
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#define READ_ADDR 0x1E000
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#define READ_NBYTES 8
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2010-02-26 20:21:46 +01:00
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/* nvm-write */
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#define WRITE_NBYTES 8
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#define WRITE_ADDR 0x1e000
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#define WRITEVAL0 0xdeadbeef
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#define WRITEVAL1 0xdeadbeef
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/* romimg */
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#define DUMP_BASE 0x00000000
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#define DUMP_LEN 0x00014000
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2010-02-26 20:51:01 +01:00
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/* flasher */
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/* if both BOOT_OK and BOOT_SECURE are 0 then flash image will not be bootable */
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/* if both are 1 then flash image will be secure */
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#define BOOT_OK 1
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#define BOOT_SECURE 0
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2010-02-26 22:37:20 +01:00
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/* sleep */
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#undef USE_32KHZ /* board should have a HAS_32KHZ define */
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2010-02-26 20:21:46 +01:00
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#endif
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