67 lines
2.3 KiB
C
67 lines
2.3 KiB
C
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/*
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* Copyright (c) 2013, University of Michigan.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/**
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* \addtogroup cc2538
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* @{
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*
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* Implementation of the low-level SPI primitives such as waiting for the TX
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* FIFO to be ready, inserting into the TX FIFO, etc.
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* @{
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*/
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/**
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* \file
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* Header file for the cc2538 SPI commands
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*/
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#ifndef SPI_ARCH_H_
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#define SPI_ARCH_H_
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#include "contiki.h"
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#include "dev/ssi.h"
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#define SPI_WAITFORTxREADY() do { \
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while(!(REG(SSI0_BASE + SSI_SR) & SSI_SR_TNF)); \
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} while (0)
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#define SPI_TXBUF REG(SSI0_BASE + SSI_DR)
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#define SPI_RXBUF REG(SSI0_BASE + SSI_DR)
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#define SPI_WAITFOREOTx() do { \
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while(REG(SSI0_BASE + SSI_SR) & SSI_SR_BSY); \
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} while (0)
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#define SPI_WAITFOREORx() do { \
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while(!(REG(SSI0_BASE + SSI_SR) & SSI_SR_RNE)); \
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} while (0)
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#endif /* SPI_ARCH_H_ */
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/**
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* @}
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* @}
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*/
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