2009-09-08 22:07:35 +02:00
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/*
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* Copyright (c) 2009, Swedish Institute of Computer Science.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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2010-01-26 00:12:09 +01:00
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* $Id: bus.c,v 1.2 2010/01/25 23:12:09 anthony-a Exp $
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2009-09-08 22:07:35 +02:00
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*/
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/**
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* \file
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* Initialization functions for the 8051 bus
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* \author
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* Adam Dunkels <adam@sics.se>
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*/
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2010-01-26 00:12:09 +01:00
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#include "banked.h"
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2009-09-08 22:07:35 +02:00
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#include "cc2430_sfr.h"
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#include "dev/bus.h"
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#include "sys/clock.h"
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/*---------------------------------------------------------------------------*/
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void
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2010-01-26 00:12:09 +01:00
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bus_init (void) __banked
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2009-09-08 22:07:35 +02:00
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{
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CLKCON = (0x00 | OSC32K); /* 32k internal */
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while(CLKCON != (0x00 | OSC32K));
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P1DIR |= 0x0E;
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IEN0_EA = 1;
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/* Initialize the clock */
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clock_init();
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}
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/*---------------------------------------------------------------------------*/
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/**
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* Read a block of code memory.
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* The code must be placed in the lowest bank of flash.
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*
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* \param address address to read from flash
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* \param buffer buffer to store data
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* \param size number of bytes to read
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*/
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void
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2010-01-26 00:12:09 +01:00
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flash_read (uint8_t *buf, uint32_t address, uint8_t size) __banked
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2009-09-08 22:07:35 +02:00
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{
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buf; /*dptr0*/
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address; /*stack-6*/
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size; /*stack-7*/
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buf;
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DISABLE_INTERRUPTS();
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__asm
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mov dpl, r2
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mov dph, r3
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mov a, r0
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push acc
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mov a, r2
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push acc
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mov a, _MEMCTR
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push acc
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mov a, _bp
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add a, #0xf9 ;stack - 7 = size
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mov r0,a
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mov a, @r0 ;r2 = size
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mov r2, a ;r2 = size
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inc r0
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mov a, @r0
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mov _DPL1, a ;DPTR1 = address & 0x7FFF | 0x8000
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inc r0
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mov a, @r0
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orl a, #0x80
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mov _DPH1, a
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inc r0 ;MEMCTR = ((address >> 15 & 3) << 4) | 0x01 (bank select)
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mov a, @r0
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dec r0
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rrc a
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mov a, @r0
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rrc a
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rr a
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rr a
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anl a, #0x30
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orl a, #1
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mov _MEMCTR,a
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lp1:
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mov _DPS, #1 ;active DPTR = 1
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clr a
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movc a, @a+dptr ;read flash (DPTR1)
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inc dptr
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mov _DPS, #0 ;active DPTR = 0
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movx @dptr,a ;write to DPTR0
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inc dptr
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djnz r2,lp1 ;while (--size)
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pop acc
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mov _MEMCTR, a ;restore bank
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pop acc
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mov r2,a
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pop acc
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mov r0,a
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__endasm;
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ENABLE_INTERRUPTS();
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DPL1 = *buf++;
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}
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/*---------------------------------------------------------------------------*/
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