124 lines
3.8 KiB
C
124 lines
3.8 KiB
C
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/**
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* \addtogroup mb851-platform
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*
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* @{
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*/
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/******************** (C) COPYRIGHT 2009 STMicroelectronics ********************
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* File Name : mems-regs.h
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* Author : MCD Application Team
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* Version : V1.0
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* Date : January 2010
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* Description : stm32w108 mems registers
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********************************************************************************
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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#ifndef _MEMS_REGS_H_
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#define _MEMS_REGS_H_
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#include <stdint.h>
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/* Size of MEMs data */
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#define MEMS_DATA_SIZE 6
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/* address of slave */
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#define KLIS3L02DQ_SLAVE_ADDR 0x38
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/* accelerometer register addresses */
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#define OFFSET_X 0x16
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#define OFFSET_Y 0x17
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#define OFFSET_Z 0x18
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#define GAIN_X 0x19
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#define GAIN_Y 0x1A
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#define GAIN_Z 0x1B
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#define CTRL_REG1 0x20
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#define CTRL_REG2 0x21
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#define STATUS_REG 0x27
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#define OUTX_L 0x28
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#define OUTX_H 0x29
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#define OUTY_L 0x2A
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#define OUTY_H 0x2B
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#define OUTZ_L 0x2C
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#define OUTZ_H 0x2D
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#define FF_WU_CFG 0x30
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#define FF_WU_SRC 0x31
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#define FF_WU_ACK 0x32
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#define FF_WU_THS_L 0x34
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#define FF_WU_THS_H 0x35
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#define FF_WU_DURATION 0x36
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#define DD_CFG 0x38
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#define DD_SRC 0x39
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#define DD_ACK 0x3A
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#define DD_THSI_L 0x3C
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#define DD_THSI_H 0x3D
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#define DD_THSE_L 0x3E
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#define DD_THSE_H 0x3F
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/* Communication control settings */
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/* I2C */
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#define REPETIR 0x80
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/* SPI */
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#define MEMS_SPI_WRITE 0x00
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#define MEMS_SPI_READ 0x80
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#define MEMS_SPI_MULTIPLE_BYTES 0x40
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/*--------------------------------------------------------------------------*/
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/* Settings for CTRL_REG1 */
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/* Power Down Control (PD) */
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#define LIS_PD_OFF 0x00
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#define LIS_PD_ON 0x40
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/* Decimation Factor Control (DF) */
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#define LIS_DF_BY128 0x00
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#define LIS_DF_BY64 0x10
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#define LIS_DF_BY32 0x20
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#define LIS_DF_BY8 0x30
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/* Self Test */
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#define LIS_ST_NORMAL 0x00
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#define LIS_ST_TEST 0x08
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/* Enable Axis */
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#define LIS_EA_ALL 0x07
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/*--------------------------------------------------------------------------*/
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/* Settings for CTRL_REG2 */
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/* Full Scale (FS) */
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#define LIS_FS_2G 0x00
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#define LIS_FS_6G 0x80
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/* Block Data Update (BDU) */
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#define LIS_BDU_CONTINUOUS 0x00
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#define LIS_BDU_WAIT 0x40
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/* Big/Little Endian Selection (BLE) */
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#define LIS_BLE_LE 0x00
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#define LIS_BLE_BE 0x20
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#define LIS_BLE_XX LIS_BLE_BE
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/* Data Alignment Selection DAS */
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#define LIS_DAS_12BIT 0x00
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#define LIS_DAS_16BIT 0x01
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/* Interrupt Enable */
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#define LIS_INTR_DISABLE 0x00
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#define LIS_INTR_ENABLE 0x08
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/* Data Ready Enable */
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#define LIS_DRDY_DISABLE 0x00
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#define LIS_DRDY_ENABLE 0x04
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/*--------------------------------------------------------------------------*/
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uint8_t i2c_write_reg(uint8_t slave_addr, uint8_t reg_addr,
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uint8_t reg_value);
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uint8_t i2c_read_reg(uint8_t slave_addr, uint8_t reg_addr, uint8_t *p_buf,
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uint8_t len);
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/*--------------------------------------------------------------------------*/
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#endif /* _MEMS_REGS_H_ */
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/** @} */
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