2010-06-10 16:49:31 +02:00
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/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org) and Contiki.
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki OS.
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*
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2011-02-13 23:12:33 +01:00
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*
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2010-06-10 16:49:31 +02:00
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*/
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/*
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The following lincence is for all parts of this code done by
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Martin Thomas. Code from others used here may have other license terms.
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Copyright (C) 2004 Martin THOMAS
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Permission is hereby granted, free of charge, to any person obtaining a copy of
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this software and associated documentation files (the "Software"), to deal in
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the Software without restriction, including without limitation the rights to
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use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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the Software, and to permit persons to whom the Software is furnished to do so,
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subject to the following conditions:
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! The above copyright notice and this permission notice shall be included in all
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! copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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// Stack Sizes
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.set UND_STACK_SIZE, 0x00000004
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.set ABT_STACK_SIZE, 0x00000004
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.set FIQ_STACK_SIZE, 0x00000004
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.set IRQ_STACK_SIZE, 0X00000080
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.set SVC_STACK_SIZE, 0x00000004
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// Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs
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.set MODE_USR, 0x10 // User Mode
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.set MODE_FIQ, 0x11 // FIQ Mode
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.set MODE_IRQ, 0x12 // IRQ Mode
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.set MODE_SVC, 0x13 // Supervisor Mode
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.set MODE_ABT, 0x17 // Abort Mode
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.set MODE_UND, 0x1B // Undefined Mode
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.set MODE_SYS, 0x1F // System Mode
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.equ I_BIT, 0x80 // when I bit is set, IRQ is disabled
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.equ F_BIT, 0x40 // when F bit is set, FIQ is disabled
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2010-11-07 15:57:53 +01:00
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.section .start
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2010-11-07 16:19:45 +01:00
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.set _rom_data_init, 0x108d0
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.global _start
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2010-06-10 16:49:31 +02:00
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_start:
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b _begin // reset - _start
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ldr pc,_undf // undefined
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ldr pc,_swi // SWI
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ldr pc,_pabt // program abort
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ldr pc,_dabt // data abort
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nop // reserved
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ldr pc,_irq // IRQ
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ldr pc,_fiq // FIQ
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/* these vectors are used for rom patching */
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.org 0x20
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.code 16
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_RPTV_0_START:
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bx lr /* do nothing */
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.org 0x60
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_RPTV_1_START:
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bx lr /* do nothing */
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.org 0xa0
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_RPTV_2_START:
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bx lr /* do nothing */
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.org 0xe0
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_RPTV_3_START:
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bx lr /* do nothing */
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.org 0x120
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ROM_var_start: .word 0
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.org 0x7ff
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ROM_var_end: .word 0
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.code 32
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.align
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_begin:
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/* FIQ mode stack */
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msr CPSR_c, #(MODE_FIQ | I_BIT | F_BIT)
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ldr sp, =__fiq_stack_top__ /* set the FIQ stack pointer */
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/* IRQ mode stack */
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msr CPSR_c, #(MODE_IRQ | I_BIT | F_BIT)
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ldr sp, =__irq_stack_top__ /* set the IRQ stack pointer */
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/* Supervisor mode stack */
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msr CPSR_c, #(MODE_SVC | I_BIT | F_BIT)
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ldr sp, =__svc_stack_top__ /* set the SVC stack pointer */
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/* Undefined mode stack */
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msr CPSR_c, #(MODE_UND | I_BIT | F_BIT)
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ldr sp, =__und_stack_top__ /* set the UND stack pointer */
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/* Abort mode stack */
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msr CPSR_c, #(MODE_ABT | I_BIT | F_BIT)
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ldr sp, =__abt_stack_top__ /* set the ABT stack pointer */
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/* System mode stack */
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msr CPSR_c, #(MODE_SYS | I_BIT | F_BIT)
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ldr sp, =__sys_stack_top__ /* set the SYS stack pointer */
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/* call the rom_data_init function in ROM */
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/* initializes ROM_var space defined by ROM_var_start and ROM_var_end */
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/* this area is used by ROM functions (e.g. nvm_read) */
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ldr r12,=_rom_data_init
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mov lr,pc
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bx r12
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msr CPSR_c, #(MODE_SYS)
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2010-11-07 16:19:45 +01:00
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/* Clear BSS */
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2010-11-07 15:49:42 +01:00
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clear_bss:
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2010-11-07 16:19:45 +01:00
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ldr r0, _bss_start /* find start of bss segment */
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ldr r1, _bss_end /* stop here */
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mov r2, #0x00000000 /* clear */
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2010-11-07 15:49:42 +01:00
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clbss_l:
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2010-11-07 16:19:45 +01:00
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str r2, [r0] /* clear loop... */
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add r0, r0, #4
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cmp r0, r1
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blt clbss_l
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b main
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2010-06-10 16:49:31 +02:00
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_undf: .word __undf // undefined
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_swi: .word __swi // SWI
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_pabt: .word __pabt // program abort
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_dabt: .word __dabt // data abort
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_irq: .word irq // IRQ
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_fiq: .word __fiq // FIQ
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__undf: b . // undefined
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__swi: b . // SWI
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__pabt: b . // program abort
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__dabt: b . // data abort
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/* IRQ handler set in isr.c */
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//__irq: b . // IRQ
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__fiq: b . // FIQ
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2010-11-07 16:19:45 +01:00
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/*
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* These are defined in the board-specific linker script.
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*/
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.globl _bss_start
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_bss_start:
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.word __bss_start
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.globl _bss_end
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_bss_end:
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.word _end
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